1270 Commits

Author SHA1 Message Date
Kevin O'Connor
116b304541 avr: Switch to input state prior to enabling pullup in gpio_in_reset()
If switching a pin from output low to input with pullup, there is an
intermediate state of either driven high or high impedance without a
pullup.  Similarly, when switching from output high to input without a
pullup, there is an intermediate state of either driven low or high
impedence with a pullup.  In both cases it is preferable for the
latter transition.

Also, calculate the final setting prior to making any changes to
reduce the time in that intermediate state.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-07-22 14:11:17 -04:00
Kevin O'Connor
3219712c17 i2c_software: Place wires in high impedance state after setup
Don't leave the wires in a high output state during setup - leave them
in a high-impedance with pullup state.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-07-22 14:04:50 -04:00
Kevin O'Connor
b761b8c654 i2c_software: Implement regular timing even on AVR chips
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-07-22 14:04:50 -04:00
Timofey Titovets
4e4a5c6336 stm32: make i2c distinguish I2C NACKs
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
2025-07-17 19:36:01 -04:00
Findlay Feng
993cec0891
sos_filter: fix overflows_int32 (#6976)
Modify the inline function overflows_int32 to static inline
Inline functions cannot be debugged in -O mode
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=49653

Signed-off-by: Findlay Feng <i@fengch.me>
2025-07-11 11:08:35 -04:00
Timofey Titovets
119d007058 stm32: f0 do not send empty write on read
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
2025-07-09 15:45:52 -04:00
Timofey Titovets
1931b11001 stm32: f0 make i2c distinguish I2C NACKs
Some devices can return a read NACK on host retries.
When the MCU receives the I2C CMD, reads out data,
but fails to deliver a response to the host.
The host retries, the device returns NACK,
and the MCU goes into the shutdown state.

Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
2025-07-09 15:45:52 -04:00
Kevin O'Connor
9346ad1914 load_cell_probe: Fix warnings on avr builds
On AVR, integers are 16bit, so be sure to promote math to 32bit where
needed.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-06-18 11:09:58 -04:00
jimmyjon711
0e52f03b5b
stm32: Adding more hardware pwm capable pins for STM32Hx series chips (#6965)
Signed-off-by: Jim Madill <jcmadill1@gmail.com>
2025-06-18 11:05:17 -04:00
Kevin O'Connor
f54b7b9376 sos_filter: Fix validate_section_index() check
A section_idx equal to max_sections is also invalid.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-06-11 17:59:02 -04:00
Kevin O'Connor
5666b88c69 ar100: Convert to or1k-elf toolchain
The more.musl.cc site is blocking downloads from all github actions,
which makes it difficult to use that site for the ar100 cross build
toolchain.  Convert to the openrisc or1k-elf toolchain as a
replacement.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-06-08 14:15:50 -04:00
Kevin O'Connor
14cbb8dd2d rp2040: Prefer larger postdiv1 on rp2040 chips
The rp2040 uses a pll vco divider of 6.  Prefer setting postdiv1=6 and
postdiv2=1 (instead of the previous postdiv1=3 and postdiv2=2).

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-06-02 14:10:42 -04:00
Kevin O'Connor
105ce35e1b stm32: Add comments on PLL frequency requirements to clock setup code
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-06-02 13:15:53 -04:00
Kevin O'Connor
cfa48fe39f stm32: Run stm32g431 at 170Mhz
The chip supports 170Mhz, so no need to run at 150Mhz.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-31 15:20:12 -04:00
Kevin O'Connor
1f3b4cc749 stm32: Fix spi overflow issue on stm32h7
Completely filling the spi transmit fifo could lead to a situation
where the rx fifo overflows.  Make sure not to write past the rx fifo
size.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-30 20:36:09 -04:00
Kevin O'Connor
8e58f8fb39 rp2040: Fix spi overflow issue
Completely filling the spi transmit fifo could lead to a situation
where the rx fifo overflows.  Make sure not to write past the rx fifo
size.

Also, be sure to wait for the transmission to fully complete before
exiting spi_transfer().

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-30 16:34:49 -04:00
Timofey Titovets
f4130aa948 rp2040: spi - enable fifo
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
2025-05-30 15:18:07 -04:00
Kevin O'Connor
de182b1d14 stm32: Support using CANBUS on PB5/PB6 on stm32h7 chips
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-30 15:15:13 -04:00
Kevin O'Connor
f5956b5395 stm32: Simplify Kconfig HAVE_STM32_CANBUS checks
Avoid unnecessary (HAVE_STM32_CANBUS && MACH_STM32xx) checks in
Kconfig.  The HAVE_STM32_CANBUS is a helper symbol for all the chips
that support canbus, there's no need to mix it with a check for a chip
that is already known to have canbus.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-30 15:15:13 -04:00
Kevin O'Connor
8d7e487149 sos_filter: Improve error checking on section_idx
Validate host provided index prior to accessing memory using that
index.

Also, consistently use a uint8_t for max_sections (to account for
integer overflow issues).

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-29 19:30:45 -04:00
Gareth Farrington
69507a0354 sensor_hx71x: Update Sensors to report to load_cell_probe
Signed-off-by: Gareth Farrington <gareth@waves.ky>
2025-05-29 19:07:49 -04:00
Gareth Farrington
42c9031c81 load_cell_probe: Create load_cell_probe MCU object
Implement MCU features that enable using an adc to stop an axis

Signed-off-by: Gareth Farrington <gareth@waves.ky>
2025-05-29 19:06:48 -04:00
Gareth Farrington
cb0c38f7d8 sos_filter: Second Order Sections MCU Filter
This is an implementation of the SOS fliltering algorithm that runs on the MCU.

The filter opperates on data in fixed point format to avoid use of the FPU as klipper does not support FPU usage.

This host object handles duties of initalizing and resetting the filter so client dont have to declare their own commands for these opperations. Clients can select how many integer bits they want to use for both the filter coefficients and the filters output value. An arbitrary number of filter sections can be configured. Filters can be designed on the fly with the SciPy library or loaded from another source.

Signed-off-by: Gareth Farrington <gareth@waves.ky>
2025-05-29 19:01:38 -04:00
Timofey Titovets
07b3726d31 stm32: h7 spi - add a delay on SCK polarity change
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
2025-05-26 18:44:29 -04:00
Timofey Titovets
28a4baf95c spi_software: add a delay on mode change
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
2025-05-26 18:44:29 -04:00
Timofey Titovets
14685bf77f rp2040: add a delay on SCK polarity change
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
2025-05-26 18:44:29 -04:00
Kevin O'Connor
9090377bbc stm32: Allow stm32g4 chips to select a bootloader
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-19 12:31:46 -04:00
Timofey Titovets
8c01be8c75
stm32: spi enable fifo if supported (#6936)
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-19 12:24:29 -04:00
Timofey Titovets
3a015cd00d stm32: H7 spi enable use of fifo
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
2025-05-19 12:21:33 -04:00
Kevin O'Connor
841a9ca2f7 stm32: Avoid read-modify-write register access in stm32h7_spi.c
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-16 12:26:52 -04:00
Kevin O'Connor
6f87a4e685 stepper: Minor code tweak - remove unneeded parenthesis
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-09 12:58:01 -04:00
Kevin O'Connor
b5aea5b774 stepper: Minor code reorg - remove unneeded HAVE_OPTIMIZED_PATH definition
Make it more clear that stepper_load_next() has three separate code
paths - one for each of the optimized stepper_event_X() functions.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-09 12:38:25 -04:00
Kevin O'Connor
fd55dd9e9d stepper: Also ensure minimum time after dir change and next step
In practice the host will not schedule any steps immediately after a
direction change (due to acceleration limits and the host
"step+dir+step filter").  However, there is also no harm in enforcing
a minimum duration in the mcu.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-09 09:52:05 -04:00
Kevin O'Connor
885f63cff0 stepper: Ensure minimum time between step pin and dir pin change
Commit 8faed8d9 made it possible to utilize stepper_event_full() while
utilizing tmc "step on both edges" optimation.  That commit would
ensure a minimum step pulse duration, but it did not ensure a minimum
duration between step pin and dir pin changes.  Commits 0d27195f and
554ae78d optimized the gpio handling on stm32h7 chips, which could
potentially cause a very small amount of time between step pin and dir
pin changes.

Enforce a minimum time after a step pin update before updating the dir
pin.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-09 09:52:05 -04:00
Kevin O'Connor
efabe63357 stepper: Move timer checks from stepper_event_full() to stepper_load_next()
This simplifies the stepper_event_full() and makes it easier to
implement more complex checks.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-09 09:52:05 -04:00
Kevin O'Connor
1dc9aa8e19 stepper: Free stepper_move struct near top of stepper_load_next()
Move up the freeing of the stepper_move struct and setting of
s->position in stepper_load_next().  This simplifies the code and
will make it easier to add more logic to this function.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-09 09:52:05 -04:00
Kevin O'Connor
554ae78d8c stm32: Run stm32h723 at 520Mhz
Increase speed of stm32h723 chips from 400Mhz to 520Mhz.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-02 11:44:31 -04:00
Kevin O'Connor
ee79d0e307 stm32: Support over 400Mhz main clock in stm32h7_adc.c
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-02 11:44:31 -04:00
Kevin O'Connor
7b697105b3 stm32: Use 12Mhz nominal internal clock in stm32f0_i2c.c
Increase the internal nominal clock from 8Mhz to 12Mhz - this improves
support for higher chip frequencies.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-05-02 11:44:31 -04:00
Kevin O'Connor
5b2f8104c7 neopixel: Round up in nsecs_to_ticks()
The rp2040 operates at a fast internal clock with a relatively slow
external timer and dividing down could result in a too small delay.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-04-28 19:55:30 -04:00
Kevin O'Connor
cf3bedfbdc stm32: Enable VOS0 power mode on stm32h723 if frequency above 400Mhz
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-04-28 19:36:55 -04:00
Kevin O'Connor
7f4f696f10 stm32: Don't try to set incorrect PWR->CR3 register on stm32h7
It's not valid to set BYPASS and LDOEN at the same time.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-04-28 19:36:55 -04:00
Kevin O'Connor
9c37a918db stm32: Set the PLL frequency equal to CONFIG_CLOCK_FREQ on stm32h723
There is no reason to use a higher internal PLL frequency.  This
change also makes it possible to enable higher clock frequencies on
the stm32h723.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-04-28 19:36:55 -04:00
Kevin O'Connor
f2b68fef73 stm32: Avoid read-modify-write register updates in stm32h7 clock_setup()
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-04-28 19:36:55 -04:00
Kevin O'Connor
c352617c30 stm32: Use enable_pclock() in stm32h7 clock_setup()
Use the helper functions to enable the peripheral clock instead of
directly manipulating the clock enable bits.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-04-28 19:36:55 -04:00
Kevin O'Connor
5d1f773ffb stm32h7: Always clear AHB1ENR at startup on stm32h7
Entirely clear the AHB1ENR register.  There is no need to modify
AHB1LPENR.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-04-28 19:36:55 -04:00
Kevin O'Connor
8e107b2280 basecmd: Update stats timing check to support 32bit duration
Use a 32bit duration check instead of the previous 31bit check.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-04-28 19:28:52 -04:00
Russell Cloran
f2b27d17b7 stm32: Add support for spi6 on stm32f42x chips
Signed-off-by: Russell Cloran <rcloran@gmail.com>
2025-04-19 12:12:55 -04:00
Kevin O'Connor
5001983d34 stm32: Fix pll_base on stm32h7 when using a clock other than 25Mhz
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-04-19 12:09:58 -04:00
Kevin O'Connor
0d27195fd4 stm32: Add optimized stm32h7_gpio.c
Add optimized gpio functions for stm32h7 - caching the ODR register
can notably improve the performance of the gpio_out_toggle() code.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
2025-04-19 11:48:58 -04:00