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stm32: h7 spi - add a delay on SCK polarity change

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Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
This commit is contained in:
Timofey Titovets 2025-05-22 23:41:47 +02:00 committed by KevinOConnor
parent 28a4baf95c
commit 07b3726d31
1 changed files with 9 additions and 2 deletions
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11
src/stm32/stm32h7_spi.c
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@ -9,6 +9,7 @@
#include "gpio.h" // spi_setup
#include "internal.h" // gpio_peripheral
#include "sched.h" // sched_shutdown
#include "board/misc.h" // timer_is_before
struct spi_info {
SPI_TypeDef *spi;
@ -113,8 +114,14 @@ spi_prepare(struct spi_config config)
// Load frequency
spi->CFG1 = (div << SPI_CFG1_MBR_Pos) | (7 << SPI_CFG1_DSIZE_Pos);
// Load mode
spi->CFG2 = ((mode << SPI_CFG2_CPHA_Pos) | SPI_CFG2_MASTER | SPI_CFG2_SSM
| SPI_CFG2_AFCNTR | SPI_CFG2_SSOE);
uint32_t cfg2 = ((mode << SPI_CFG2_CPHA_Pos) | SPI_CFG2_MASTER
| SPI_CFG2_SSM | SPI_CFG2_AFCNTR | SPI_CFG2_SSOE);
uint32_t diff = spi->CFG2 ^ cfg2;
spi->CFG2 = cfg2;
uint32_t end = timer_read_time() + timer_from_us(1);
if (diff & SPI_CFG2_CPOL_Msk)
while (timer_is_before(timer_read_time(), end))
;
}
void