From 07b3726d31c528402fffaa7537e45edb507b8fca Mon Sep 17 00:00:00 2001 From: Timofey Titovets Date: Thu, 22 May 2025 23:41:47 +0200 Subject: [PATCH] stm32: h7 spi - add a delay on SCK polarity change Signed-off-by: Timofey Titovets --- src/stm32/stm32h7_spi.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/src/stm32/stm32h7_spi.c b/src/stm32/stm32h7_spi.c index 9e5aef5b..0f49b5e9 100644 --- a/src/stm32/stm32h7_spi.c +++ b/src/stm32/stm32h7_spi.c @@ -9,6 +9,7 @@ #include "gpio.h" // spi_setup #include "internal.h" // gpio_peripheral #include "sched.h" // sched_shutdown +#include "board/misc.h" // timer_is_before struct spi_info { SPI_TypeDef *spi; @@ -113,8 +114,14 @@ spi_prepare(struct spi_config config) // Load frequency spi->CFG1 = (div << SPI_CFG1_MBR_Pos) | (7 << SPI_CFG1_DSIZE_Pos); // Load mode - spi->CFG2 = ((mode << SPI_CFG2_CPHA_Pos) | SPI_CFG2_MASTER | SPI_CFG2_SSM - | SPI_CFG2_AFCNTR | SPI_CFG2_SSOE); + uint32_t cfg2 = ((mode << SPI_CFG2_CPHA_Pos) | SPI_CFG2_MASTER + | SPI_CFG2_SSM | SPI_CFG2_AFCNTR | SPI_CFG2_SSOE); + uint32_t diff = spi->CFG2 ^ cfg2; + spi->CFG2 = cfg2; + uint32_t end = timer_read_time() + timer_from_us(1); + if (diff & SPI_CFG2_CPOL_Msk) + while (timer_is_before(timer_read_time(), end)) + ; } void