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368 Commits

Author SHA1 Message Date
Timofey Titovets
4e4a5c6336 stm32: make i2c distinguish I2C NACKs 
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
 2025-07-17 19:36:01 -04:00
Timofey Titovets
119d007058 stm32: f0 do not send empty write on read 
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
 2025-07-09 15:45:52 -04:00
Timofey Titovets
1931b11001 stm32: f0 make i2c distinguish I2C NACKs 
Some devices can return a read NACK on host retries.
When the MCU receives the I2C CMD, reads out data,
but fails to deliver a response to the host.
The host retries, the device returns NACK,
and the MCU goes into the shutdown state.

Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
 2025-07-09 15:45:52 -04:00
jimmyjon711
0e52f03b5b
stm32: Adding more hardware pwm capable pins for STM32Hx series chips (#6965) 
Signed-off-by: Jim Madill <jcmadill1@gmail.com>
 2025-06-18 11:05:17 -04:00
Kevin O'Connor
105ce35e1b stm32: Add comments on PLL frequency requirements to clock setup code 
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-06-02 13:15:53 -04:00
Kevin O'Connor
cfa48fe39f stm32: Run stm32g431 at 170Mhz 
The chip supports 170Mhz, so no need to run at 150Mhz.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-05-31 15:20:12 -04:00
Kevin O'Connor
1f3b4cc749 stm32: Fix spi overflow issue on stm32h7 
Completely filling the spi transmit fifo could lead to a situation
where the rx fifo overflows.  Make sure not to write past the rx fifo
size.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-05-30 20:36:09 -04:00
Kevin O'Connor
de182b1d14 stm32: Support using CANBUS on PB5/PB6 on stm32h7 chips 
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-05-30 15:15:13 -04:00
Kevin O'Connor
f5956b5395 stm32: Simplify Kconfig HAVE_STM32_CANBUS checks 
Avoid unnecessary (HAVE_STM32_CANBUS && MACH_STM32xx) checks in
Kconfig.  The HAVE_STM32_CANBUS is a helper symbol for all the chips
that support canbus, there's no need to mix it with a check for a chip
that is already known to have canbus.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-05-30 15:15:13 -04:00
Timofey Titovets
07b3726d31 stm32: h7 spi - add a delay on SCK polarity change 
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
 2025-05-26 18:44:29 -04:00
Kevin O'Connor
9090377bbc stm32: Allow stm32g4 chips to select a bootloader 
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-05-19 12:31:46 -04:00
Timofey Titovets
8c01be8c75
stm32: spi enable fifo if supported (#6936) 
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-05-19 12:24:29 -04:00
Timofey Titovets
3a015cd00d stm32: H7 spi enable use of fifo 
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
 2025-05-19 12:21:33 -04:00
Kevin O'Connor
841a9ca2f7 stm32: Avoid read-modify-write register access in stm32h7_spi.c 
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-05-16 12:26:52 -04:00
Kevin O'Connor
554ae78d8c stm32: Run stm32h723 at 520Mhz 
Increase speed of stm32h723 chips from 400Mhz to 520Mhz.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-05-02 11:44:31 -04:00
Kevin O'Connor
ee79d0e307 stm32: Support over 400Mhz main clock in stm32h7_adc.c 
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-05-02 11:44:31 -04:00
Kevin O'Connor
7b697105b3 stm32: Use 12Mhz nominal internal clock in stm32f0_i2c.c 
Increase the internal nominal clock from 8Mhz to 12Mhz - this improves
support for higher chip frequencies.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-05-02 11:44:31 -04:00
Kevin O'Connor
cf3bedfbdc stm32: Enable VOS0 power mode on stm32h723 if frequency above 400Mhz 
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-28 19:36:55 -04:00
Kevin O'Connor
7f4f696f10 stm32: Don't try to set incorrect PWR->CR3 register on stm32h7 
It's not valid to set BYPASS and LDOEN at the same time.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-28 19:36:55 -04:00
Kevin O'Connor
9c37a918db stm32: Set the PLL frequency equal to CONFIG_CLOCK_FREQ on stm32h723 
There is no reason to use a higher internal PLL frequency.  This
change also makes it possible to enable higher clock frequencies on
the stm32h723.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-28 19:36:55 -04:00
Kevin O'Connor
f2b68fef73 stm32: Avoid read-modify-write register updates in stm32h7 clock_setup() 
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-28 19:36:55 -04:00
Kevin O'Connor
c352617c30 stm32: Use enable_pclock() in stm32h7 clock_setup() 
Use the helper functions to enable the peripheral clock instead of
directly manipulating the clock enable bits.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-28 19:36:55 -04:00
Kevin O'Connor
5d1f773ffb stm32h7: Always clear AHB1ENR at startup on stm32h7 
Entirely clear the AHB1ENR register.  There is no need to modify
AHB1LPENR.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-28 19:36:55 -04:00
Russell Cloran
f2b27d17b7 stm32: Add support for spi6 on stm32f42x chips 
Signed-off-by: Russell Cloran <rcloran@gmail.com>
 2025-04-19 12:12:55 -04:00
Kevin O'Connor
5001983d34 stm32: Fix pll_base on stm32h7 when using a clock other than 25Mhz 
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-19 12:09:58 -04:00
Kevin O'Connor
0d27195fd4 stm32: Add optimized stm32h7_gpio.c 
Add optimized gpio functions for stm32h7 - caching the ODR register
can notably improve the performance of the gpio_out_toggle() code.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-19 11:48:58 -04:00
Kevin O'Connor
3656006a30 stm32: Change hard_pwm.c MAX_PWM to 257 
Choose a value for MAX_PWM that avoids an expensive run-time division.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-17 12:07:44 -04:00
Kevin O'Connor
7a9b06ad86 stm32: Fix prescaler overflow check in hard_pwm.c 
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-17 12:07:44 -04:00
Kevin O'Connor
d93645a750 stm32: Simplify Makefile 
Breakout selection of timer and gpioperiph objects.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-16 13:54:44 -04:00
Kevin O'Connor
8c67adc164 Kconfig: Add new WANT_ADC option to reduce code size 
Make it possible to not compile in support for ADC on chips with small
flash sizes.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-16 13:54:44 -04:00
Kevin O'Connor
04e7eb20fd Kconfig: Add new WANT_I2C option to reduce code size 
Make it possible to not compile in support for I2C on chips with small
flash sizes.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-16 13:54:44 -04:00
Kevin O'Connor
868760f5b1 Kconfig: Add new WANT_SPI option to reduce code size 
Make it possible to not compile in support for SPI on chips with small
flash sizes.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-16 13:54:44 -04:00
Kevin O'Connor
b0fa36e221 Kconfig: Add new WANT_HARD_PWM option to reduce code size 
Make it possible to not compile in support for hardware pwm on chips
with small flash sizes.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-16 13:54:44 -04:00
Kevin O'Connor
6356e3d35c stm32: Enable gcc -Os option on CONFIG_HAVE_LIMITED_CODE_SIZE 
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-16 13:54:44 -04:00
Kevin O'Connor
8176ba22aa stm32: Turn on can.c error interrupts 
It seems both ERRIE and LECIE must be enabled to get hardware error
interrupts.  Without this, the rx_error and tx_error reports are
likely to always be zero.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-03 13:32:23 -04:00
Russell Cloran
4b9add2fc3 stm32: Add support for additional i2c bus 
Signed-off-by: Russell Cloran <rcloran@gmail.com>
 2025-04-02 10:07:52 -04:00
Kevin O'Connor
55f60601ca stm32: Fix RESERVE_PINS_CAN pin ordering in fdcan.c 
Always report the reserved pins in the same order (rx,tx).

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-04-01 21:25:34 -04:00
FrY Sennberg
d679f711eb
stm32: Added PH13/14 CAN pin option for stm32h743 (#6857) 
Added the option to select PH13/PH14 as CAN pins.

Signed-off-by:  Christoph Frei <fryakatkop@gmail.com>
 2025-03-27 19:25:26 -04:00
Kevin O'Connor
8faed8d9fe stepper: Support step on both edges with custom minimum pulse duration 
Add support for "step on both edges" to the main stepper_event_full()
code.  This makes that mode of operation available even when the
micro-controller is not compiled for "optimized step on both edges".
It also enables the custom pulse duration support (step_pulse_ticks)
when in "step on both edges" mode.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-03-20 19:56:55 -04:00
Marius Petcu
3e7efe5ef1 stm32: Add support for USART6 on STM32F401 
STM32F401 has USART6 on PA12/PA11 and PC7/PC6 with alternate
function mapping AF08. This can be used, for example, to connect
to the Elegoo Neptune 3, where PA12/PA11 are wired to an RJ10 plug
going to the stock screen.

Signed-off-by: Marius Petcu <marius@petcu.me>
 2025-03-07 17:52:46 -05:00
Kevin O'Connor
1fc6d214f4 stm32: Add support for stm32f070x6 mcus 
This mcu has smaller memory and may require remapping of PA11/PA12.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-02-16 13:57:59 -05:00
Timofey Titovets
fec3e685c9 stm32: h7 spi support reload mode & frequency 
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
 2025-02-06 12:10:29 -05:00
Kevin O'Connor
b7366ae3fc stm32: Add support for reporting canbus state from fdcan.c 
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-02-02 18:43:34 -05:00
Kevin O'Connor
6cdcf75e6b stm32: Add support for reporting canbus state from can.c 
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2025-02-02 18:43:34 -05:00
Timofey Titovets
48590a35e4 stm32: forward i2c errors to i2ccmd 
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
 2024-10-26 22:06:30 -04:00
Timofey Titovets
a4aa2a9002 i2c: handle errors at i2ccmds 
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
 2024-10-26 22:06:30 -04:00
Liam Powell
fe89c19ac0
stm32: Add support for USART3 on PC11/PC10 on STM32G474. (#6704) 
Signed-off-by: Liam Powell <liam@liampwll.com>
 2024-10-24 11:10:09 -04:00
Timofey Titovets
b89d552387
stm32: allow 400Khz in stm32f0_i2c.c (#6694) 
Signed-off-by: Timofey Titovets <nefelim4ag@gmail.com>
 2024-10-09 20:00:38 -04:00
Kevin O'Connor
064eee6859 stm32: Fix i2c clock speeds for chips with a peripheral clock over 48Mhz 
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2024-09-22 22:14:47 -04:00
Kevin O'Connor
8b7cc43952 stm32: Reduce peripheral clock speed on stm32g4 chips 
A 170mhz (or 150mhz) peripheral clock is too fast for some peripherals.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
 2024-09-22 21:18:34 -04:00