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stm32: Don't try to set incorrect PWR->CR3 register on stm32h7

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It's not valid to set BYPASS and LDOEN at the same time.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2025-04-22 00:13:32 -04:00
parent 9c37a918db
commit 7f4f696f10
1 changed files with 3 additions and 5 deletions
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8
src/stm32/stm32h7.c
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@ -128,17 +128,15 @@ clock_setup(void)
while (!(PWR->D3CR & PWR_D3CR_VOSRDY)) while (!(PWR->D3CR & PWR_D3CR_VOSRDY))
; ;
// Enable VOS0 (overdrive) // Enable VOS0 (overdrive) on stm32h743/stm32h750
#if !CONFIG_MACH_STM32H723
if (CONFIG_CLOCK_FREQ > 400000000) { if (CONFIG_CLOCK_FREQ > 400000000) {
enable_pclock((uint32_t)SYSCFG); enable_pclock((uint32_t)SYSCFG);
#if !CONFIG_MACH_STM32H723
SYSCFG->PWRCR |= SYSCFG_PWRCR_ODEN; SYSCFG->PWRCR |= SYSCFG_PWRCR_ODEN;
#else
PWR->CR3 |= PWR_CR3_BYPASS;
#endif
while (!(PWR->D3CR & PWR_D3CR_VOSRDY)) while (!(PWR->D3CR & PWR_D3CR_VOSRDY))
; ;
} }
#endif
SCB_EnableICache(); SCB_EnableICache();
SCB_EnableDCache(); SCB_EnableDCache();