From 7f4f696f104d073eeacb749e3238d5f8516fd591 Mon Sep 17 00:00:00 2001 From: Kevin O'Connor Date: Tue, 22 Apr 2025 00:13:32 -0400 Subject: [PATCH] stm32: Don't try to set incorrect PWR->CR3 register on stm32h7 It's not valid to set BYPASS and LDOEN at the same time. Signed-off-by: Kevin O'Connor --- src/stm32/stm32h7.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/src/stm32/stm32h7.c b/src/stm32/stm32h7.c index 79d4ab99..bac39c96 100644 --- a/src/stm32/stm32h7.c +++ b/src/stm32/stm32h7.c @@ -128,17 +128,15 @@ clock_setup(void) while (!(PWR->D3CR & PWR_D3CR_VOSRDY)) ; - // Enable VOS0 (overdrive) + // Enable VOS0 (overdrive) on stm32h743/stm32h750 +#if !CONFIG_MACH_STM32H723 if (CONFIG_CLOCK_FREQ > 400000000) { enable_pclock((uint32_t)SYSCFG); -#if !CONFIG_MACH_STM32H723 SYSCFG->PWRCR |= SYSCFG_PWRCR_ODEN; -#else - PWR->CR3 |= PWR_CR3_BYPASS; -#endif while (!(PWR->D3CR & PWR_D3CR_VOSRDY)) ; } +#endif SCB_EnableICache(); SCB_EnableDCache();