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https://github.com/andreili/klipper.git
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Rename sched_tasks_busy() to sched_check_set_tasks_busy() and change it to only return true if tasks are active (running or requested) for two consecutive calls. This makes it less likely that timers will yield to tasks except when tasks really are notably backlogged. This also makes it less likely that multiple steppers controlling the same rail will be interrupted by tasks mid-step. This should slightly improve the timing, and make it less likely that a halt during homing/probing will occur with these steppers taking a different number of total steps. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
213 lines
5.4 KiB
C
213 lines
5.4 KiB
C
// AVR timer interrupt scheduling code.
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//
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// Copyright (C) 2016,2017 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include <avr/interrupt.h> // TCNT1
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#include "autoconf.h" // CONFIG_AVR_CLKPR
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#include "board/misc.h" // timer_from_us
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#include "command.h" // shutdown
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#include "irq.h" // irq_save
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#include "sched.h" // sched_timer_dispatch
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/****************************************************************
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* Low level timer code
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****************************************************************/
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DECL_CONSTANT("CLOCK_FREQ", CONFIG_CLOCK_FREQ);
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// Return the number of clock ticks for a given number of microseconds
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uint32_t
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timer_from_us(uint32_t us)
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{
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return us * (CONFIG_CLOCK_FREQ / 1000000);
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}
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union u32_u {
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struct { uint8_t b0, b1, b2, b3; };
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struct { uint16_t lo, hi; };
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uint32_t val;
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};
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// Return true if time1 is before time2. Always use this function to
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// compare times as regular C comparisons can fail if the counter
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// rolls over.
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uint8_t __always_inline
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timer_is_before(uint32_t time1, uint32_t time2)
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{
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// This asm is equivalent to:
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// return (int32_t)(time1 - time2) < 0;
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// But gcc doesn't do a good job with the above, so it's hand coded.
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union u32_u utime1 = { .val = time1 };
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uint8_t f = utime1.b3;
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asm(" cp %A1, %A2\n"
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" cpc %B1, %B2\n"
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" cpc %C1, %C2\n"
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" sbc %0, %D2"
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: "+r"(f) : "r"(time1), "r"(time2));
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return (int8_t)f < 0;
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}
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static inline uint16_t
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timer_get(void)
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{
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return TCNT1;
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}
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static inline void
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timer_set(uint16_t next)
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{
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OCR1A = next;
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}
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static inline void
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timer_repeat_set(uint16_t next)
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{
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// Timer1B is used to limit the number of timers run from a timer1A irq
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OCR1B = next;
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// This is "TIFR1 = 1<<OCF1B" - gcc handles that poorly, so it's hand coded
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uint8_t dummy;
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asm volatile("ldi %0, %2\n out %1, %0"
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: "=d"(dummy) : "i"(&TIFR1 - 0x20), "i"(1<<OCF1B));
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}
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// Activate timer dispatch as soon as possible
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void
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timer_kick(void)
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{
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timer_set(timer_get() + 50);
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TIFR1 = 1<<OCF1A;
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}
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static struct timer wrap_timer;
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void
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timer_reset(void)
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{
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sched_add_timer(&wrap_timer);
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}
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DECL_SHUTDOWN(timer_reset);
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void
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timer_init(void)
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{
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irqstatus_t flag = irq_save();
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// no outputs
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TCCR1A = 0;
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// Normal Mode
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TCCR1B = 1<<CS10;
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// Setup for first irq
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TCNT1 = 0;
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timer_kick();
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timer_repeat_set(timer_get() + 50);
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timer_reset();
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TIFR1 = 1<<TOV1;
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// enable interrupt
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TIMSK1 = 1<<OCIE1A;
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irq_restore(flag);
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}
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DECL_INIT(timer_init);
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/****************************************************************
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* 32bit timer wrappers
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****************************************************************/
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static uint16_t timer_high;
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// Return the current time (in absolute clock ticks).
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uint32_t
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timer_read_time(void)
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{
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irqstatus_t flag = irq_save();
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union u32_u calc = { .val = timer_get() };
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calc.hi = timer_high;
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if (unlikely(TIFR1 & (1<<TOV1))) {
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irq_restore(flag);
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if (calc.b1 < 0xff)
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calc.hi++;
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return calc.val;
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}
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irq_restore(flag);
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return calc.val;
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}
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// Timer that runs every ~2ms - allows 16bit comparison optimizations
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static uint_fast8_t
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timer_event(struct timer *t)
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{
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union u32_u *nextwake = (void*)&wrap_timer.waketime;
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if (TIFR1 & (1<<TOV1)) {
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// Hardware timer has overflowed - update overflow counter
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TIFR1 = 1<<TOV1;
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timer_high++;
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*nextwake = (union u32_u){ .hi = timer_high, .lo = 0x8000 };
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} else {
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*nextwake = (union u32_u){ .hi = timer_high + 1, .lo = 0x0000 };
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}
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return SF_RESCHEDULE;
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}
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static struct timer wrap_timer = {
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.func = timer_event,
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.waketime = 0x8000,
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};
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#define TIMER_IDLE_REPEAT_TICKS 8000
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#define TIMER_REPEAT_TICKS 3000
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#define TIMER_MIN_ENTRY_TICKS 44
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#define TIMER_MIN_EXIT_TICKS 47
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#define TIMER_MIN_TRY_TICKS (TIMER_MIN_ENTRY_TICKS + TIMER_MIN_EXIT_TICKS)
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#define TIMER_DEFER_REPEAT_TICKS 256
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// Hardware timer IRQ handler - dispatch software timers
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ISR(TIMER1_COMPA_vect)
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{
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uint16_t next;
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for (;;) {
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// Run the next software timer
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next = sched_timer_dispatch();
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for (;;) {
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int16_t diff = timer_get() - next;
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if (likely(diff >= 0)) {
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// Another timer is pending - briefly allow irqs and then run it
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irq_enable();
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if (unlikely(TIFR1 & (1<<OCF1B)))
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goto check_defer;
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irq_disable();
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break;
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}
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if (likely(diff <= -TIMER_MIN_TRY_TICKS))
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// Schedule next timer normally
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goto done;
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irq_enable();
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if (unlikely(TIFR1 & (1<<OCF1B)))
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goto check_defer;
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irq_disable();
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continue;
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check_defer:
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// Check if there are too many repeat timers
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irq_disable();
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uint16_t now = timer_get();
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if ((int16_t)(next - now) < (int16_t)(-timer_from_us(1000)))
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try_shutdown("Rescheduled timer in the past");
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if (sched_check_set_tasks_busy()) {
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timer_repeat_set(now + TIMER_REPEAT_TICKS);
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next = now + TIMER_DEFER_REPEAT_TICKS;
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goto done;
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}
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timer_repeat_set(now + TIMER_IDLE_REPEAT_TICKS);
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timer_set(now);
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}
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}
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done:
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timer_set(next);
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}
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