diff --git a/src/stm32/stm32h7_spi.c b/src/stm32/stm32h7_spi.c
index 0f49b5e9..d1e514e7 100644
--- a/src/stm32/stm32h7_spi.c
+++ b/src/stm32/stm32h7_spi.c
@@ -124,13 +124,13 @@ spi_prepare(struct spi_config config)
             ;
 }
 
+#define MAX_FIFO 8 // Limit tx fifo usage so rx fifo doesn't overrun
+
 void
 spi_transfer(struct spi_config config, uint8_t receive_data,
              uint8_t len, uint8_t *data)
 {
-    uint8_t rdata = 0;
-    uint8_t* wptr = data;
-    uint8_t* end = data + len;
+    uint8_t *wptr = data, *end = data + len;
     SPI_TypeDef *spi = config.spi;
 
     spi->CR2 = len << SPI_CR2_TSIZE_Pos;
@@ -140,15 +140,13 @@ spi_transfer(struct spi_config config, uint8_t receive_data,
 
     while (data < end) {
         uint32_t sr = spi->SR & (SPI_SR_TXP | SPI_SR_RXP);
-        if ((sr == SPI_SR_TXP) && wptr < end)
+        if (sr == SPI_SR_TXP && wptr < end && wptr < data + MAX_FIFO)
             writeb((void*)&spi->TXDR, *wptr++);
         if (!(sr & SPI_SR_RXP))
             continue;
-        rdata = readb((void *)&spi->RXDR);
-
-        if (receive_data) {
+        uint8_t rdata = readb((void *)&spi->RXDR);
+        if (receive_data)
             *data = rdata;
-        }
         data++;
     }