From 14cbb8dd2db14a473fe0a01c626d9bbecc420144 Mon Sep 17 00:00:00 2001 From: Kevin O'Connor Date: Mon, 2 Jun 2025 14:10:42 -0400 Subject: [PATCH] rp2040: Prefer larger postdiv1 on rp2040 chips The rp2040 uses a pll vco divider of 6. Prefer setting postdiv1=6 and postdiv2=1 (instead of the previous postdiv1=3 and postdiv2=2). Signed-off-by: Kevin O'Connor --- src/rp2040/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/rp2040/main.c b/src/rp2040/main.c index 97fa5eb8..40869618 100644 --- a/src/rp2040/main.c +++ b/src/rp2040/main.c @@ -113,8 +113,8 @@ static void pll_setup(pll_hw_t *pll, uint32_t mul, uint32_t postdiv) { // Setup pll - uint32_t refdiv = 1, fbdiv = mul, postdiv2 = 2, postdiv1 = postdiv/postdiv2; - if (postdiv1 > 0x07) { + uint32_t refdiv = 1, fbdiv = mul, postdiv2 = 1, postdiv1 = postdiv; + while (postdiv1 > 0x07) { postdiv1 >>= 1; postdiv2 <<= 1; }