mirror of
https://github.com/andreili/katapult.git
synced 2025-08-24 03:44:06 +02:00
c0014efc4a
Synchronize with the latest Klipper code. This pulls in the latest lib/ files (needed to use the pico-sdk v2.0.0 version). It updates to latest can2040 code (needed for pico-sdk v2.0.0 support). It implements USB double buffering (as is now done in Klipper). It adds in support for additional UART pins (as is now done in Klipper). It adds support for rp2350 chips. This replaces the execute in ram code previously implemented in Katapult with the execute in ram code that is now standard in Klipper. The CONFIG_RP2040_ADD_BOOT_SIGNATURE kconfig symbol was removed and the build now always produces a katapult.withclear.uf2 file. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
52 lines
2.0 KiB
C
52 lines
2.0 KiB
C
// THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
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/**
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* Copyright (c) 2024 Raspberry Pi Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _HARDWARE_STRUCTS_XIP_AUX_H
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#define _HARDWARE_STRUCTS_XIP_AUX_H
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/**
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* \file rp2350/xip_aux.h
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*/
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#include "hardware/address_mapped.h"
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#include "hardware/regs/xip_aux.h"
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// Reference to datasheet: https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf#tab-registerlist_xip_aux
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//
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// The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature)
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// _REG_(x) will link to the corresponding register in hardware/regs/xip_aux.h.
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//
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// Bit-field descriptions are of the form:
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// BITMASK [BITRANGE] FIELDNAME (RESETVALUE) DESCRIPTION
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typedef struct {
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_REG_(XIP_AUX_STREAM_OFFSET) // XIP_AUX_STREAM
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// Read the XIP stream FIFO (fast bus access to XIP_CTRL_STREAM_FIFO)
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// 0xffffffff [31:0] STREAM (0x00000000)
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io_ro_32 stream;
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_REG_(XIP_AUX_QMI_DIRECT_TX_OFFSET) // XIP_AUX_QMI_DIRECT_TX
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// Write to the QMI direct-mode TX FIFO (fast bus access to QMI_DIRECT_TX)
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// 0x00100000 [20] NOPUSH (0) Inhibit the RX FIFO push that would correspond to this...
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// 0x00080000 [19] OE (0) Output enable (active-high)
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// 0x00040000 [18] DWIDTH (0) Data width
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// 0x00030000 [17:16] IWIDTH (0x0) Configure whether this FIFO record is transferred with...
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// 0x0000ffff [15:0] DATA (0x0000) Data pushed here will be clocked out falling edges of...
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io_wo_32 qmi_direct_tx;
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_REG_(XIP_AUX_QMI_DIRECT_RX_OFFSET) // XIP_AUX_QMI_DIRECT_RX
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// Read from the QMI direct-mode RX FIFO (fast bus access to QMI_DIRECT_RX)
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// 0x0000ffff [15:0] QMI_DIRECT_RX (0x0000) With each byte clocked out on the serial interface, one...
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io_ro_32 qmi_direct_rx;
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} xip_aux_hw_t;
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#define xip_aux_hw ((xip_aux_hw_t *)XIP_AUX_BASE)
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static_assert(sizeof (xip_aux_hw_t) == 0x000c, "");
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#endif // _HARDWARE_STRUCTS_XIP_AUX_H
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