mirror of
https://github.com/andreili/katapult.git
synced 2025-08-24 03:44:06 +02:00
c0014efc4a
Synchronize with the latest Klipper code. This pulls in the latest lib/ files (needed to use the pico-sdk v2.0.0 version). It updates to latest can2040 code (needed for pico-sdk v2.0.0 support). It implements USB double buffering (as is now done in Klipper). It adds in support for additional UART pins (as is now done in Klipper). It adds support for rp2350 chips. This replaces the execute in ram code previously implemented in Katapult with the execute in ram code that is now standard in Klipper. The CONFIG_RP2040_ADD_BOOT_SIGNATURE kconfig symbol was removed and the build now always produces a katapult.withclear.uf2 file. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
84 lines
3.2 KiB
C
84 lines
3.2 KiB
C
// THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
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/**
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* Copyright (c) 2024 Raspberry Pi Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _HARDWARE_STRUCTS_SYSCFG_H
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#define _HARDWARE_STRUCTS_SYSCFG_H
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/**
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* \file rp2350/syscfg.h
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*/
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#include "hardware/address_mapped.h"
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#include "hardware/regs/syscfg.h"
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// Reference to datasheet: https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf#tab-registerlist_syscfg
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//
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// The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature)
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// _REG_(x) will link to the corresponding register in hardware/regs/syscfg.h.
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//
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// Bit-field descriptions are of the form:
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// BITMASK [BITRANGE] FIELDNAME (RESETVALUE) DESCRIPTION
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typedef struct {
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_REG_(SYSCFG_PROC_CONFIG_OFFSET) // SYSCFG_PROC_CONFIG
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// Configuration for processors
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// 0x00000002 [1] PROC1_HALTED (0) Indication that proc1 has halted
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// 0x00000001 [0] PROC0_HALTED (0) Indication that proc0 has halted
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io_ro_32 proc_config;
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_REG_(SYSCFG_PROC_IN_SYNC_BYPASS_OFFSET) // SYSCFG_PROC_IN_SYNC_BYPASS
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// For each bit, if 1, bypass the input synchronizer between that GPIO +
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// 0xffffffff [31:0] GPIO (0x00000000)
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io_rw_32 proc_in_sync_bypass;
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_REG_(SYSCFG_PROC_IN_SYNC_BYPASS_HI_OFFSET) // SYSCFG_PROC_IN_SYNC_BYPASS_HI
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// For each bit, if 1, bypass the input synchronizer between that GPIO +
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// 0xf0000000 [31:28] QSPI_SD (0x0)
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// 0x08000000 [27] QSPI_CSN (0)
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// 0x04000000 [26] QSPI_SCK (0)
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// 0x02000000 [25] USB_DM (0)
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// 0x01000000 [24] USB_DP (0)
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// 0x0000ffff [15:0] GPIO (0x0000)
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io_rw_32 proc_in_sync_bypass_hi;
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_REG_(SYSCFG_DBGFORCE_OFFSET) // SYSCFG_DBGFORCE
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// Directly control the chip SWD debug port
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// 0x00000008 [3] ATTACH (0) Attach chip debug port to syscfg controls, and...
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// 0x00000004 [2] SWCLK (1) Directly drive SWCLK, if ATTACH is set
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// 0x00000002 [1] SWDI (1) Directly drive SWDIO input, if ATTACH is set
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// 0x00000001 [0] SWDO (-) Observe the value of SWDIO output
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io_rw_32 dbgforce;
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_REG_(SYSCFG_MEMPOWERDOWN_OFFSET) // SYSCFG_MEMPOWERDOWN
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// Control PD pins to memories
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// 0x00001000 [12] BOOTRAM (0)
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// 0x00000800 [11] ROM (0)
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// 0x00000400 [10] USB (0)
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// 0x00000200 [9] SRAM9 (0)
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// 0x00000100 [8] SRAM8 (0)
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// 0x00000080 [7] SRAM7 (0)
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// 0x00000040 [6] SRAM6 (0)
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// 0x00000020 [5] SRAM5 (0)
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// 0x00000010 [4] SRAM4 (0)
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// 0x00000008 [3] SRAM3 (0)
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// 0x00000004 [2] SRAM2 (0)
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// 0x00000002 [1] SRAM1 (0)
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// 0x00000001 [0] SRAM0 (0)
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io_rw_32 mempowerdown;
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_REG_(SYSCFG_AUXCTRL_OFFSET) // SYSCFG_AUXCTRL
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// Auxiliary system control register
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// 0x000000ff [7:0] AUXCTRL (0x00) * Bits 7:2: Reserved
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io_rw_32 auxctrl;
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} syscfg_hw_t;
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#define syscfg_hw ((syscfg_hw_t *)SYSCFG_BASE)
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static_assert(sizeof (syscfg_hw_t) == 0x0018, "");
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#endif // _HARDWARE_STRUCTS_SYSCFG_H
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