From cc2a3e3df72e34c1b756401e0596fe65f00590ea Mon Sep 17 00:00:00 2001 From: sh83 Date: Fri, 21 Oct 2022 22:33:58 +0300 Subject: [PATCH] rp2040: Import flash and bootrom related files from pico-sdk (https://github.com/raspberrypi/pico-sdk/tree/master/src/rp2_common/hardware_flash, https://github.com/raspberrypi/pico-sdk/tree/master/src/rp2_common/pico_bootrom) as is. Signed-off-by: Alex Malishev --- src/rp2040/bootrom.h | 172 ++++++++++++++++++++++++++++++++++++++++++ src/rp2040/flash.c | 176 +++++++++++++++++++++++++++++++++++++++++++ src/rp2040/flash.h | 113 +++++++++++++++++++++++++++ 3 files changed, 461 insertions(+) create mode 100644 src/rp2040/bootrom.h create mode 100644 src/rp2040/flash.c create mode 100644 src/rp2040/flash.h diff --git a/src/rp2040/bootrom.h b/src/rp2040/bootrom.h new file mode 100644 index 0000000..4484568 --- /dev/null +++ b/src/rp2040/bootrom.h @@ -0,0 +1,172 @@ +/* + * Copyright (c) 2020 Raspberry Pi (Trading) Ltd. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef _PLATFORM_BOOTROM_H +#define _PLATFORM_BOOTROM_H + +#include "pico.h" + +/** \file bootrom.h + * \defgroup pico_bootrom pico_bootrom + * Access to functions and data in the RP2040 bootrom + * + * This header may be included by assembly code + */ + +// ROM FUNCTIONS + +#define ROM_FUNC_POPCOUNT32 ROM_TABLE_CODE('P', '3') +#define ROM_FUNC_REVERSE32 ROM_TABLE_CODE('R', '3') +#define ROM_FUNC_CLZ32 ROM_TABLE_CODE('L', '3') +#define ROM_FUNC_CTZ32 ROM_TABLE_CODE('T', '3') +#define ROM_FUNC_MEMSET ROM_TABLE_CODE('M', 'S') +#define ROM_FUNC_MEMSET4 ROM_TABLE_CODE('S', '4') +#define ROM_FUNC_MEMCPY ROM_TABLE_CODE('M', 'C') +#define ROM_FUNC_MEMCPY44 ROM_TABLE_CODE('C', '4') +#define ROM_FUNC_RESET_USB_BOOT ROM_TABLE_CODE('U', 'B') +#define ROM_FUNC_CONNECT_INTERNAL_FLASH ROM_TABLE_CODE('I', 'F') +#define ROM_FUNC_FLASH_EXIT_XIP ROM_TABLE_CODE('E', 'X') +#define ROM_FUNC_FLASH_RANGE_ERASE ROM_TABLE_CODE('R', 'E') +#define ROM_FUNC_FLASH_RANGE_PROGRAM ROM_TABLE_CODE('R', 'P') +#define ROM_FUNC_FLASH_FLUSH_CACHE ROM_TABLE_CODE('F', 'C') +#define ROM_FUNC_FLASH_ENTER_CMD_XIP ROM_TABLE_CODE('C', 'X') + +/*! \brief Return a bootrom lookup code based on two ASCII characters + * \ingroup pico_bootrom + * + * These codes are uses to lookup data or function addresses in the bootrom + * + * \param c1 the first character + * \param c2 the second character + * \return the 'code' to use in rom_func_lookup() or rom_data_lookup() + */ +#define ROM_TABLE_CODE(c1, c2) ((c1) | ((c2) << 8)) + +#ifndef __ASSEMBLER__ + +// ROM FUNCTION SIGNATURES + +typedef uint32_t (*rom_popcount32_fn)(uint32_t); +typedef uint32_t (*rom_reverse32_fn)(uint32_t); +typedef uint32_t (*rom_clz32_fn)(uint32_t); +typedef uint32_t (*rom_ctz32_fn)(uint32_t); +typedef uint8_t *(*rom_memset_fn)(uint8_t *, uint8_t, uint32_t); +typedef uint32_t *(*rom_memset4_fn)(uint32_t *, uint8_t, uint32_t); +typedef uint32_t *(*rom_memcpy_fn)(uint8_t *, const uint8_t *, uint32_t); +typedef uint32_t *(*rom_memcpy44_fn)(uint32_t *, const uint32_t *, uint32_t); +typedef void __attribute__((noreturn)) (*rom_reset_usb_boot_fn)(uint32_t, uint32_t); +typedef rom_reset_usb_boot_fn reset_usb_boot_fn; // kept for backwards compatibility +typedef void (*rom_connect_internal_flash_fn)(void); +typedef void (*rom_flash_exit_xip_fn)(void); +typedef void (*rom_flash_range_erase_fn)(uint32_t, size_t, uint32_t, uint8_t); +typedef void (*rom_flash_range_program_fn)(uint32_t, const uint8_t*, size_t); +typedef void (*rom_flash_flush_cache_fn)(void); +typedef void (*rom_flash_enter_cmd_xip_fn)(void); + +#ifdef __cplusplus +extern "C" { +#endif + +/*! \brief Return a bootrom lookup code based on two ASCII characters + * \ingroup pico_bootrom + * + * These codes are uses to lookup data or function addresses in the bootrom + * + * \param c1 the first character + * \param c2 the second character + * \return the 'code' to use in rom_func_lookup() or rom_data_lookup() + */ +static inline uint32_t rom_table_code(uint8_t c1, uint8_t c2) { + return ROM_TABLE_CODE((uint32_t) c1, (uint32_t) c2); +} + +/*! + * \brief Lookup a bootrom function by code + * \ingroup pico_bootrom + * \param code the code + * \return a pointer to the function, or NULL if the code does not match any bootrom function + */ +void *rom_func_lookup(uint32_t code); + +/*! + * \brief Lookup a bootrom address by code + * \ingroup pico_bootrom + * \param code the code + * \return a pointer to the data, or NULL if the code does not match any bootrom function + */ +void *rom_data_lookup(uint32_t code); + +/*! + * \brief Helper function to lookup the addresses of multiple bootrom functions + * \ingroup pico_bootrom + * + * This method looks up the 'codes' in the table, and convert each table entry to the looked up + * function pointer, if there is a function for that code in the bootrom. + * + * \param table an IN/OUT array, elements are codes on input, function pointers on success. + * \param count the number of elements in the table + * \return true if all the codes were found, and converted to function pointers, false otherwise + */ +bool rom_funcs_lookup(uint32_t *table, unsigned int count); + +// Bootrom function: rom_table_lookup +// Returns the 32 bit pointer into the ROM if found or NULL otherwise. +typedef void *(*rom_table_lookup_fn)(uint16_t *table, uint32_t code); + +#if defined(__GNUC__) && (__GNUC__ >= 12) +// Convert a 16 bit pointer stored at the given rom address into a 32 bit pointer +static inline void *rom_hword_as_ptr(uint16_t rom_address) { +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Warray-bounds" + return (void *)(uintptr_t)*(uint16_t *)(uintptr_t)rom_address; +#pragma GCC diagnostic pop +} +#else +// Convert a 16 bit pointer stored at the given rom address into a 32 bit pointer +#define rom_hword_as_ptr(rom_address) (void *)(uintptr_t)(*(uint16_t *)(uintptr_t)(rom_address)) +#endif + +/*! + * \brief Lookup a bootrom function by code. This method is forceably inlined into the caller for FLASH/RAM sensitive code usage + * \ingroup pico_bootrom + * \param code the code + * \return a pointer to the function, or NULL if the code does not match any bootrom function + */ +static __force_inline void *rom_func_lookup_inline(uint32_t code) { + rom_table_lookup_fn rom_table_lookup = (rom_table_lookup_fn) rom_hword_as_ptr(0x18); + uint16_t *func_table = (uint16_t *) rom_hword_as_ptr(0x14); + return rom_table_lookup(func_table, code); +} + +/*! + * \brief Reboot the device into BOOTSEL mode + * \ingroup pico_bootrom + * + * This function reboots the device into the BOOTSEL mode ('usb boot"). + * + * Facilities are provided to enable an "activity light" via GPIO attached LED for the USB Mass Storage Device, + * and to limit the USB interfaces exposed. + * + * \param usb_activity_gpio_pin_mask 0 No pins are used as per a cold boot. Otherwise a single bit set indicating which + * GPIO pin should be set to output and raised whenever there is mass storage activity + * from the host. + * \param disable_interface_mask value to control exposed interfaces + * - 0 To enable both interfaces (as per a cold boot) + * - 1 To disable the USB Mass Storage Interface + * - 2 To disable the USB PICOBOOT Interface + */ +static inline void __attribute__((noreturn)) reset_usb_boot(uint32_t usb_activity_gpio_pin_mask, + uint32_t disable_interface_mask) { + rom_reset_usb_boot_fn func = (rom_reset_usb_boot_fn) rom_func_lookup(ROM_FUNC_RESET_USB_BOOT); + func(usb_activity_gpio_pin_mask, disable_interface_mask); +} + +#ifdef __cplusplus +} +#endif + +#endif // !__ASSEMBLER__ +#endif diff --git a/src/rp2040/flash.c b/src/rp2040/flash.c new file mode 100644 index 0000000..5699302 --- /dev/null +++ b/src/rp2040/flash.c @@ -0,0 +1,176 @@ +/* + * Copyright (c) 2020 Raspberry Pi (Trading) Ltd. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "hardware/flash.h" +#include "pico/bootrom.h" + +#include "hardware/structs/ssi.h" +#include "hardware/structs/ioqspi.h" + +#define FLASH_BLOCK_ERASE_CMD 0xd8 + +// Standard RUID instruction: 4Bh command prefix, 32 dummy bits, 64 data bits. +#define FLASH_RUID_CMD 0x4b +#define FLASH_RUID_DUMMY_BYTES 4 +#define FLASH_RUID_DATA_BYTES 8 +#define FLASH_RUID_TOTAL_BYTES (1 + FLASH_RUID_DUMMY_BYTES + FLASH_RUID_DATA_BYTES) + +//----------------------------------------------------------------------------- +// Infrastructure for reentering XIP mode after exiting for programming (take +// a copy of boot2 before XIP exit). Calling boot2 as a function works because +// it accepts a return vector in LR (and doesn't trash r4-r7). Bootrom passes +// NULL in LR, instructing boot2 to enter flash vector table's reset handler. + +#if !PICO_NO_FLASH + +#define BOOT2_SIZE_WORDS 64 + +static uint32_t boot2_copyout[BOOT2_SIZE_WORDS]; +static bool boot2_copyout_valid = false; + +static void __no_inline_not_in_flash_func(flash_init_boot2_copyout)(void) { + if (boot2_copyout_valid) + return; + for (int i = 0; i < BOOT2_SIZE_WORDS; ++i) + boot2_copyout[i] = ((uint32_t *)XIP_BASE)[i]; + __compiler_memory_barrier(); + boot2_copyout_valid = true; +} + +static void __no_inline_not_in_flash_func(flash_enable_xip_via_boot2)(void) { + ((void (*)(void))boot2_copyout+1)(); +} + +#else + +static void __no_inline_not_in_flash_func(flash_init_boot2_copyout)(void) {} + +static void __no_inline_not_in_flash_func(flash_enable_xip_via_boot2)(void) { + // Set up XIP for 03h read on bus access (slow but generic) + rom_flash_enter_cmd_xip_fn flash_enter_cmd_xip = (rom_flash_enter_cmd_xip_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_ENTER_CMD_XIP); + assert(flash_enter_cmd_xip); + flash_enter_cmd_xip(); +} + +#endif + +//----------------------------------------------------------------------------- +// Actual flash programming shims (work whether or not PICO_NO_FLASH==1) + +void __no_inline_not_in_flash_func(flash_range_erase)(uint32_t flash_offs, size_t count) { +#ifdef PICO_FLASH_SIZE_BYTES + hard_assert(flash_offs + count <= PICO_FLASH_SIZE_BYTES); +#endif + invalid_params_if(FLASH, flash_offs & (FLASH_SECTOR_SIZE - 1)); + invalid_params_if(FLASH, count & (FLASH_SECTOR_SIZE - 1)); + rom_connect_internal_flash_fn connect_internal_flash = (rom_connect_internal_flash_fn)rom_func_lookup_inline(ROM_FUNC_CONNECT_INTERNAL_FLASH); + rom_flash_exit_xip_fn flash_exit_xip = (rom_flash_exit_xip_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_EXIT_XIP); + rom_flash_range_erase_fn flash_range_erase = (rom_flash_range_erase_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_RANGE_ERASE); + rom_flash_flush_cache_fn flash_flush_cache = (rom_flash_flush_cache_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_FLUSH_CACHE); + assert(connect_internal_flash && flash_exit_xip && flash_range_erase && flash_flush_cache); + flash_init_boot2_copyout(); + + // No flash accesses after this point + __compiler_memory_barrier(); + + connect_internal_flash(); + flash_exit_xip(); + flash_range_erase(flash_offs, count, FLASH_BLOCK_SIZE, FLASH_BLOCK_ERASE_CMD); + flash_flush_cache(); // Note this is needed to remove CSn IO force as well as cache flushing + flash_enable_xip_via_boot2(); +} + +void __no_inline_not_in_flash_func(flash_range_program)(uint32_t flash_offs, const uint8_t *data, size_t count) { +#ifdef PICO_FLASH_SIZE_BYTES + hard_assert(flash_offs + count <= PICO_FLASH_SIZE_BYTES); +#endif + invalid_params_if(FLASH, flash_offs & (FLASH_PAGE_SIZE - 1)); + invalid_params_if(FLASH, count & (FLASH_PAGE_SIZE - 1)); + rom_connect_internal_flash_fn connect_internal_flash = (rom_connect_internal_flash_fn)rom_func_lookup_inline(ROM_FUNC_CONNECT_INTERNAL_FLASH); + rom_flash_exit_xip_fn flash_exit_xip = (rom_flash_exit_xip_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_EXIT_XIP); + rom_flash_range_program_fn flash_range_program = (rom_flash_range_program_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_RANGE_PROGRAM); + rom_flash_flush_cache_fn flash_flush_cache = (rom_flash_flush_cache_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_FLUSH_CACHE); + assert(connect_internal_flash && flash_exit_xip && flash_range_program && flash_flush_cache); + flash_init_boot2_copyout(); + + __compiler_memory_barrier(); + + connect_internal_flash(); + flash_exit_xip(); + flash_range_program(flash_offs, data, count); + flash_flush_cache(); // Note this is needed to remove CSn IO force as well as cache flushing + flash_enable_xip_via_boot2(); +} + +//----------------------------------------------------------------------------- +// Lower-level flash access functions + +#if !PICO_NO_FLASH +// Bitbanging the chip select using IO overrides, in case RAM-resident IRQs +// are still running, and the FIFO bottoms out. (the bootrom does the same) +static void __no_inline_not_in_flash_func(flash_cs_force)(bool high) { + uint32_t field_val = high ? + IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_VALUE_HIGH : + IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_VALUE_LOW; + hw_write_masked(&ioqspi_hw->io[1].ctrl, + field_val << IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_LSB, + IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_BITS + ); +} + +void __no_inline_not_in_flash_func(flash_do_cmd)(const uint8_t *txbuf, uint8_t *rxbuf, size_t count) { + rom_connect_internal_flash_fn connect_internal_flash = (rom_connect_internal_flash_fn)rom_func_lookup_inline(ROM_FUNC_CONNECT_INTERNAL_FLASH); + rom_flash_exit_xip_fn flash_exit_xip = (rom_flash_exit_xip_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_EXIT_XIP); + rom_flash_flush_cache_fn flash_flush_cache = (rom_flash_flush_cache_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_FLUSH_CACHE); + assert(connect_internal_flash && flash_exit_xip && flash_flush_cache); + flash_init_boot2_copyout(); + __compiler_memory_barrier(); + connect_internal_flash(); + flash_exit_xip(); + + flash_cs_force(0); + size_t tx_remaining = count; + size_t rx_remaining = count; + // We may be interrupted -- don't want FIFO to overflow if we're distracted. + const size_t max_in_flight = 16 - 2; + while (tx_remaining || rx_remaining) { + uint32_t flags = ssi_hw->sr; + bool can_put = !!(flags & SSI_SR_TFNF_BITS); + bool can_get = !!(flags & SSI_SR_RFNE_BITS); + if (can_put && tx_remaining && rx_remaining - tx_remaining < max_in_flight) { + ssi_hw->dr0 = *txbuf++; + --tx_remaining; + } + if (can_get && rx_remaining) { + *rxbuf++ = (uint8_t)ssi_hw->dr0; + --rx_remaining; + } + } + flash_cs_force(1); + + flash_flush_cache(); + flash_enable_xip_via_boot2(); +} +#endif + +// Use standard RUID command to get a unique identifier for the flash (and +// hence the board) + +static_assert(FLASH_UNIQUE_ID_SIZE_BYTES == FLASH_RUID_DATA_BYTES, ""); + +void flash_get_unique_id(uint8_t *id_out) { +#if PICO_NO_FLASH + __unused uint8_t *ignore = id_out; + panic_unsupported(); +#else + uint8_t txbuf[FLASH_RUID_TOTAL_BYTES] = {0}; + uint8_t rxbuf[FLASH_RUID_TOTAL_BYTES] = {0}; + txbuf[0] = FLASH_RUID_CMD; + flash_do_cmd(txbuf, rxbuf, FLASH_RUID_TOTAL_BYTES); + for (int i = 0; i < FLASH_RUID_DATA_BYTES; i++) + id_out[i] = rxbuf[i + 1 + FLASH_RUID_DUMMY_BYTES]; +#endif +} diff --git a/src/rp2040/flash.h b/src/rp2040/flash.h new file mode 100644 index 0000000..e6cd229 --- /dev/null +++ b/src/rp2040/flash.h @@ -0,0 +1,113 @@ +/* + * Copyright (c) 2020 Raspberry Pi (Trading) Ltd. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef _HARDWARE_FLASH_H +#define _HARDWARE_FLASH_H + +#include "pico.h" + +/** \file flash.h + * \defgroup hardware_flash hardware_flash + * + * Low level flash programming and erase API + * + * Note these functions are *unsafe* if you have two cores concurrently + * executing from flash. In this case you must perform your own + * synchronisation to make sure no XIP accesses take place during flash + * programming. + * + * Likewise they are *unsafe* if you have interrupt handlers or an interrupt + * vector table in flash, so you must disable interrupts before calling in + * this case. + * + * If PICO_NO_FLASH=1 is not defined (i.e. if the program is built to run from + * flash) then these functions will make a static copy of the second stage + * bootloader in SRAM, and use this to reenter execute-in-place mode after + * programming or erasing flash, so that they can safely be called from + * flash-resident code. + * + * \subsection flash_example Example + * \include flash_program.c + */ + +// PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_FLASH, Enable/disable assertions in the flash module, type=bool, default=0, group=hardware_flash +#ifndef PARAM_ASSERTIONS_ENABLED_FLASH +#define PARAM_ASSERTIONS_ENABLED_FLASH 0 +#endif + +#define FLASH_PAGE_SIZE (1u << 8) +#define FLASH_SECTOR_SIZE (1u << 12) +#define FLASH_BLOCK_SIZE (1u << 16) + +#define FLASH_UNIQUE_ID_SIZE_BYTES 8 + +// PICO_CONFIG: PICO_FLASH_SIZE_BYTES, size of primary flash in bytes, type=int, group=hardware_flash + +#ifdef __cplusplus +extern "C" { +#endif + +/*! \brief Erase areas of flash + * \ingroup hardware_flash + * + * \param flash_offs Offset into flash, in bytes, to start the erase. Must be aligned to a 4096-byte flash sector. + * \param count Number of bytes to be erased. Must be a multiple of 4096 bytes (one sector). + */ +void flash_range_erase(uint32_t flash_offs, size_t count); + +/*! \brief Program flash + * \ingroup hardware_flash + * + * \param flash_offs Flash address of the first byte to be programmed. Must be aligned to a 256-byte flash page. + * \param data Pointer to the data to program into flash + * \param count Number of bytes to program. Must be a multiple of 256 bytes (one page). + */ + +void flash_range_program(uint32_t flash_offs, const uint8_t *data, size_t count); + +/*! \brief Get flash unique 64 bit identifier + * \ingroup hardware_flash + * + * Use a standard 4Bh RUID instruction to retrieve the 64 bit unique + * identifier from a flash device attached to the QSPI interface. Since there + * is a 1:1 association between the MCU and this flash, this also serves as a + * unique identifier for the board. + * + * \param id_out Pointer to an 8-byte buffer to which the ID will be written + */ +void flash_get_unique_id(uint8_t *id_out); + +/*! \brief Execute bidirectional flash command + * \ingroup hardware_flash + * + * Low-level function to execute a serial command on a flash device attached + * to the QSPI interface. Bytes are simultaneously transmitted and received + * from txbuf and to rxbuf. Therefore, both buffers must be the same length, + * count, which is the length of the overall transaction. This is useful for + * reading metadata from the flash chip, such as device ID or SFDP + * parameters. + * + * The XIP cache is flushed following each command, in case flash state + * has been modified. Like other hardware_flash functions, the flash is not + * accessible for execute-in-place transfers whilst the command is in + * progress, so entering a flash-resident interrupt handler or executing flash + * code on the second core concurrently will be fatal. To avoid these pitfalls + * it is recommended that this function only be used to extract flash metadata + * during startup, before the main application begins to run: see the + * implementation of pico_get_unique_id() for an example of this. + * + * \param txbuf Pointer to a byte buffer which will be transmitted to the flash + * \param rxbuf Pointer to a byte buffer where data received from the flash will be written. txbuf and rxbuf may be the same buffer. + * \param count Length in bytes of txbuf and of rxbuf + */ +void flash_do_cmd(const uint8_t *txbuf, uint8_t *rxbuf, size_t count); + + +#ifdef __cplusplus +} +#endif + +#endif