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lib: sync can2040 with klipper latest

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Signed-off-by:  Eric Callahan <arksine.code@gmail.com>
This commit is contained in:
Eric Callahan 2023-07-26 10:48:50 -04:00
parent d0480d26d6
commit 67020a492f
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GPG Key ID: 5A1EB336DFB4C71B
1 changed files with 59 additions and 38 deletions
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97
lib/can2040/can2040.c
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@ -76,21 +76,21 @@ rp2040_gpio_peripheral(uint32_t gpio, int func, int pull_up)
#define can2040_offset_shared_rx_read 13u #define can2040_offset_shared_rx_read 13u
#define can2040_offset_shared_rx_end 15u #define can2040_offset_shared_rx_end 15u
#define can2040_offset_match_load_next 18u #define can2040_offset_match_load_next 18u
#define can2040_offset_tx_conflict 24u
#define can2040_offset_match_end 25u #define can2040_offset_match_end 25u
#define can2040_offset_tx_got_recessive 25u #define can2040_offset_tx_got_recessive 25u
#define can2040_offset_tx_start 26u #define can2040_offset_tx_write_pin 27u
#define can2040_offset_tx_conflict 31u
static const uint16_t can2040_program_instructions[] = { static const uint16_t can2040_program_instructions[] = {
0x0085, // 0: jmp y--, 5 0x0085, // 0: jmp y--, 5
0x0048, // 1: jmp x--, 8 0x0048, // 1: jmp x--, 8
0xe12a, // 2: set x, 10 [1] 0xe029, // 2: set x, 9
0x00cc, // 3: jmp pin, 12 0x00cc, // 3: jmp pin, 12
0xc000, // 4: irq nowait 0 0xc000, // 4: irq nowait 0
0x00c0, // 5: jmp pin, 0 0x00c0, // 5: jmp pin, 0
0xc040, // 6: irq clear 0 0xc040, // 6: irq clear 0
0xe229, // 7: set x, 9 [2] 0xe429, // 7: set x, 9 [4]
0xf242, // 8: set y, 2 [18] 0xf043, // 8: set y, 3 [16]
0xc104, // 9: irq nowait 4 [1] 0xc104, // 9: irq nowait 4 [1]
0x03c5, // 10: jmp pin, 5 [3] 0x03c5, // 10: jmp pin, 5 [3]
0x0307, // 11: jmp 7 [3] 0x0307, // 11: jmp 7 [3]
@ -98,7 +98,7 @@ static const uint16_t can2040_program_instructions[] = {
0x20c4, // 13: wait 1 irq, 4 0x20c4, // 13: wait 1 irq, 4
0x4001, // 14: in pins, 1 0x4001, // 14: in pins, 1
0xa046, // 15: mov y, isr 0xa046, // 15: mov y, isr
0x00b2, // 16: jmp x != y, 18 0x01b2, // 16: jmp x != y, 18 [1]
0xc002, // 17: irq nowait 2 0xc002, // 17: irq nowait 2
0x40eb, // 18: in osr, 11 0x40eb, // 18: in osr, 11
0x4054, // 19: in y, 20 0x4054, // 19: in y, 20
@ -107,13 +107,13 @@ static const uint16_t can2040_program_instructions[] = {
0xa027, // 22: mov x, osr 0xa027, // 22: mov x, osr
0x0098, // 23: jmp y--, 24 0x0098, // 23: jmp y--, 24
0xa0e2, // 24: mov osr, y 0xa0e2, // 24: mov osr, y
0xa242, // 25: nop [2] 0x6021, // 25: out x, 1
0x6021, // 26: out x, 1 0x00df, // 26: jmp pin, 31
0xa001, // 27: mov pins, x 0xb801, // 27: mov pins, x [24]
0x20c4, // 28: wait 1 irq, 4 0x02d9, // 28: jmp pin, 25 [2]
0x00d9, // 29: jmp pin, 25 0x0058, // 29: jmp x--, 24
0x023a, // 30: jmp !x, 26 [2] 0x6021, // 30: out x, 1
0xc027, // 31: irq wait 7 0x011b, // 31: jmp 27 [1]
}; };
// Local names for PIO state machine IRQs // Local names for PIO state machine IRQs
@ -138,7 +138,7 @@ pio_sync_setup(struct can2040 *cd)
| cd->gpio_rx << PIO_SM0_PINCTRL_SET_BASE_LSB); | cd->gpio_rx << PIO_SM0_PINCTRL_SET_BASE_LSB);
sm->instr = 0xe080; // set pindirs, 0 sm->instr = 0xe080; // set pindirs, 0
sm->pinctrl = 0; sm->pinctrl = 0;
pio_hw->txf[0] = PIO_CLOCK_PER_BIT / 2 * 7 - 5 - 1; pio_hw->txf[0] = 9 + 6 * PIO_CLOCK_PER_BIT / 2;
sm->instr = 0x80a0; // pull block sm->instr = 0x80a0; // pull block
sm->instr = can2040_offset_sync_entry; // jmp sync_entry sm->instr = can2040_offset_sync_entry; // jmp sync_entry
} }
@ -183,7 +183,10 @@ pio_tx_setup(struct can2040 *cd)
{ {
pio_hw_t *pio_hw = cd->pio_hw; pio_hw_t *pio_hw = cd->pio_hw;
struct pio_sm_hw *sm = &pio_hw->sm[3]; struct pio_sm_hw *sm = &pio_hw->sm[3];
sm->execctrl = cd->gpio_rx << PIO_SM0_EXECCTRL_JMP_PIN_LSB; sm->execctrl = (
cd->gpio_rx << PIO_SM0_EXECCTRL_JMP_PIN_LSB
| can2040_offset_tx_conflict << PIO_SM0_EXECCTRL_WRAP_TOP_LSB
| can2040_offset_tx_conflict << PIO_SM0_EXECCTRL_WRAP_BOTTOM_LSB);
sm->shiftctrl = (PIO_SM0_SHIFTCTRL_FJOIN_TX_BITS sm->shiftctrl = (PIO_SM0_SHIFTCTRL_FJOIN_TX_BITS
| PIO_SM0_SHIFTCTRL_AUTOPULL_BITS); | PIO_SM0_SHIFTCTRL_AUTOPULL_BITS);
sm->pinctrl = (1 << PIO_SM0_PINCTRL_SET_COUNT_LSB sm->pinctrl = (1 << PIO_SM0_PINCTRL_SET_COUNT_LSB
@ -247,6 +250,7 @@ static void
pio_tx_reset(struct can2040 *cd) pio_tx_reset(struct can2040 *cd)
{ {
pio_hw_t *pio_hw = cd->pio_hw; pio_hw_t *pio_hw = cd->pio_hw;
pio_hw->ctrl = 0x07 << PIO_CTRL_SM_ENABLE_LSB;
pio_hw->ctrl = ((0x07 << PIO_CTRL_SM_ENABLE_LSB) pio_hw->ctrl = ((0x07 << PIO_CTRL_SM_ENABLE_LSB)
| (0x08 << PIO_CTRL_SM_RESTART_LSB)); | (0x08 << PIO_CTRL_SM_RESTART_LSB));
pio_hw->irq = (SI_MATCHED | SI_ACKDONE) >> 8; // clear PIO irq flags pio_hw->irq = (SI_MATCHED | SI_ACKDONE) >> 8; // clear PIO irq flags
@ -255,9 +259,6 @@ pio_tx_reset(struct can2040 *cd)
sm->shiftctrl = 0; sm->shiftctrl = 0;
sm->shiftctrl = (PIO_SM0_SHIFTCTRL_FJOIN_TX_BITS sm->shiftctrl = (PIO_SM0_SHIFTCTRL_FJOIN_TX_BITS
| PIO_SM0_SHIFTCTRL_AUTOPULL_BITS); | PIO_SM0_SHIFTCTRL_AUTOPULL_BITS);
// Must reset again after clearing fifo
pio_hw->ctrl = ((0x07 << PIO_CTRL_SM_ENABLE_LSB)
| (0x08 << PIO_CTRL_SM_RESTART_LSB));
} }
// Queue a message for transmission on PIO "tx" state machine // Queue a message for transmission on PIO "tx" state machine
@ -266,13 +267,14 @@ pio_tx_send(struct can2040 *cd, uint32_t *data, uint32_t count)
{ {
pio_hw_t *pio_hw = cd->pio_hw; pio_hw_t *pio_hw = cd->pio_hw;
pio_tx_reset(cd); pio_tx_reset(cd);
pio_hw->instr_mem[can2040_offset_tx_got_recessive] = 0xa242; // nop [2] pio_hw->instr_mem[can2040_offset_tx_got_recessive] = 0x6021; // out x, 1
int i; uint32_t i;
for (i=0; i<count; i++) for (i=0; i<count; i++)
pio_hw->txf[3] = data[i]; pio_hw->txf[3] = data[i];
struct pio_sm_hw *sm = &pio_hw->sm[3]; struct pio_sm_hw *sm = &pio_hw->sm[3];
sm->instr = 0xe001; // set pins, 1 sm->instr = 0xe001; // set pins, 1
sm->instr = can2040_offset_tx_start; // jmp tx_start sm->instr = 0x6021; // out x, 1
sm->instr = can2040_offset_tx_write_pin; // jmp tx_write_pin
sm->instr = 0x20c0; // wait 1 irq, 0 sm->instr = 0x20c0; // wait 1 irq, 0
pio_hw->ctrl = 0x0f << PIO_CTRL_SM_ENABLE_LSB; pio_hw->ctrl = 0x0f << PIO_CTRL_SM_ENABLE_LSB;
} }
@ -287,7 +289,8 @@ pio_tx_inject_ack(struct can2040 *cd, uint32_t match_key)
pio_hw->txf[3] = 0x7fffffff; pio_hw->txf[3] = 0x7fffffff;
struct pio_sm_hw *sm = &pio_hw->sm[3]; struct pio_sm_hw *sm = &pio_hw->sm[3];
sm->instr = 0xe001; // set pins, 1 sm->instr = 0xe001; // set pins, 1
sm->instr = can2040_offset_tx_start; // jmp tx_start sm->instr = 0x6021; // out x, 1
sm->instr = can2040_offset_tx_write_pin; // jmp tx_write_pin
sm->instr = 0x20c2; // wait 1 irq, 2 sm->instr = 0x20c2; // wait 1 irq, 2
pio_hw->ctrl = 0x0f << PIO_CTRL_SM_ENABLE_LSB; pio_hw->ctrl = 0x0f << PIO_CTRL_SM_ENABLE_LSB;
@ -351,7 +354,7 @@ pio_sm_setup(struct can2040 *cd)
pio_signal_set_txpending(cd); pio_signal_set_txpending(cd);
// Load pio program // Load pio program
int i; uint32_t i;
for (i=0; i<ARRAY_SIZE(can2040_program_instructions); i++) for (i=0; i<ARRAY_SIZE(can2040_program_instructions); i++)
pio_hw->instr_mem[i] = can2040_program_instructions[i]; pio_hw->instr_mem[i] = can2040_program_instructions[i];
@ -436,9 +439,9 @@ static inline uint32_t
crc_bytes(uint32_t crc, uint32_t data, uint32_t num) crc_bytes(uint32_t crc, uint32_t data, uint32_t num)
{ {
switch (num) { switch (num) {
default: crc = crc_byte(crc, data >> 24); default: crc = crc_byte(crc, data >> 24); /* FALLTHRU */
case 3: crc = crc_byte(crc, data >> 16); case 3: crc = crc_byte(crc, data >> 16); /* FALLTHRU */
case 2: crc = crc_byte(crc, data >> 8); case 2: crc = crc_byte(crc, data >> 8); /* FALLTHRU */
case 1: crc = crc_byte(crc, data); case 1: crc = crc_byte(crc, data);
} }
return crc; return crc;
@ -647,14 +650,19 @@ tx_schedule_transmit(struct can2040 *cd)
if (cd->tx_state == TS_QUEUED && !pio_tx_did_fail(cd)) if (cd->tx_state == TS_QUEUED && !pio_tx_did_fail(cd))
// Already queued or actively transmitting // Already queued or actively transmitting
return 0; return 0;
if (cd->tx_push_pos == cd->tx_pull_pos) { uint32_t tx_pull_pos = cd->tx_pull_pos;
if (readl(&cd->tx_push_pos) == tx_pull_pos) {
// No new messages to transmit // No new messages to transmit
cd->tx_state = TS_IDLE; cd->tx_state = TS_IDLE;
pio_signal_clear_txpending(cd); pio_signal_clear_txpending(cd);
return SI_TXPENDING; __DMB();
if (likely(readl(&cd->tx_push_pos) == tx_pull_pos))
return SI_TXPENDING;
// Raced with can2040_transmit() - msg is now available for transmit
pio_signal_set_txpending(cd);
} }
cd->tx_state = TS_QUEUED; cd->tx_state = TS_QUEUED;
struct can2040_transmit *qt = &cd->tx_queue[tx_qpos(cd, cd->tx_pull_pos)]; struct can2040_transmit *qt = &cd->tx_queue[tx_qpos(cd, tx_pull_pos)];
pio_tx_send(cd, qt->stuffed_data, qt->stuffed_words); pio_tx_send(cd, qt->stuffed_data, qt->stuffed_words);
return 0; return 0;
} }
@ -675,8 +683,11 @@ tx_check_local_message(struct can2040 *cd)
return 0; return 0;
struct can2040_transmit *qt = &cd->tx_queue[tx_qpos(cd, cd->tx_pull_pos)]; struct can2040_transmit *qt = &cd->tx_queue[tx_qpos(cd, cd->tx_pull_pos)];
struct can2040_msg *pm = &cd->parse_msg, *tm = &qt->msg; struct can2040_msg *pm = &cd->parse_msg, *tm = &qt->msg;
if (qt->crc == cd->parse_crc && tm->id == pm->id && tm->dlc == pm->dlc if (tm->id == pm->id) {
&& tm->data32[0] == pm->data32[0] && tm->data32[1] == pm->data32[1]) { if (qt->crc != cd->parse_crc || tm->dlc != pm->dlc
|| tm->data32[0] != pm->data32[0] || tm->data32[1] != pm->data32[1])
// Message with same id that differs in content - an error
return -1;
// This is a self transmit // This is a self transmit
cd->tx_state = TS_CONFIRM_TX; cd->tx_state = TS_CONFIRM_TX;
return 1; return 1;
@ -717,7 +728,7 @@ report_callback_rx_msg(struct can2040 *cd)
static void static void
report_callback_tx_msg(struct can2040 *cd) report_callback_tx_msg(struct can2040 *cd)
{ {
cd->tx_pull_pos++; writel(&cd->tx_pull_pos, cd->tx_pull_pos + 1);
cd->rx_cb(cd, CAN2040_NOTIFY_TX, &cd->parse_msg); cd->rx_cb(cd, CAN2040_NOTIFY_TX, &cd->parse_msg);
} }
@ -752,22 +763,25 @@ report_note_message_start(struct can2040 *cd)
} }
// Setup for ack injection (if receiving) or ack confirmation (if transmit) // Setup for ack injection (if receiving) or ack confirmation (if transmit)
static void static int
report_note_crc_start(struct can2040 *cd) report_note_crc_start(struct can2040 *cd)
{ {
int ret = tx_check_local_message(cd); int ret = tx_check_local_message(cd);
if (ret) { if (ret) {
if (ret < 0)
return -1;
// This is a self transmit - setup tx eof "matched" signal // This is a self transmit - setup tx eof "matched" signal
cd->report_state = RS_NEED_TX_ACK; cd->report_state = RS_NEED_TX_ACK;
uint32_t bits = (cd->parse_crc_bits << 9) | 0x0ff; uint32_t bits = (cd->parse_crc_bits << 9) | 0x0ff;
pio_match_check(cd, pio_match_calc_key(bits, cd->parse_crc_pos + 9)); pio_match_check(cd, pio_match_calc_key(bits, cd->parse_crc_pos + 9));
return; return 0;
} }
// Setup for ack inject (after rx fifos fully drained) // Setup for ack inject (after rx fifos fully drained)
cd->report_state = RS_NEED_RX_ACK; cd->report_state = RS_NEED_RX_ACK;
pio_signal_set_txpending(cd); pio_signal_set_txpending(cd);
pio_irq_set(cd, SI_MAYTX | SI_TXPENDING); pio_irq_set(cd, SI_MAYTX | SI_TXPENDING);
return 0;
} }
// Parser successfully found matching crc // Parser successfully found matching crc
@ -856,7 +870,9 @@ report_line_maytx(struct can2040 *cd)
static void static void
report_line_txpending(struct can2040 *cd) report_line_txpending(struct can2040 *cd)
{ {
if (cd->report_state == RS_NEED_RX_ACK) { uint32_t pio_irqs = pio_irq_get(cd);
if (pio_irqs == (SI_MAYTX | SI_TXPENDING | SI_RX_DATA)
&& cd->report_state == RS_NEED_RX_ACK) {
// Ack inject request from report_note_crc_start() // Ack inject request from report_note_crc_start()
uint32_t mk = pio_match_calc_key(cd->parse_crc_bits, cd->parse_crc_pos); uint32_t mk = pio_match_calc_key(cd->parse_crc_bits, cd->parse_crc_pos);
tx_inject_ack(cd, mk); tx_inject_ack(cd, mk);
@ -866,7 +882,7 @@ report_line_txpending(struct can2040 *cd)
// Tx request from can2040_transmit(), report_note_eof_success(), // Tx request from can2040_transmit(), report_note_eof_success(),
// or report_note_parse_error(). // or report_note_parse_error().
uint32_t check_txpending = tx_schedule_transmit(cd); uint32_t check_txpending = tx_schedule_transmit(cd);
pio_irq_set(cd, (pio_irq_get(cd) & ~SI_TXPENDING) | check_txpending); pio_irq_set(cd, (pio_irqs & ~SI_TXPENDING) | check_txpending);
} }
@ -954,7 +970,11 @@ data_state_go_crc(struct can2040 *cd)
cd->parse_crc_bits = (crc_bits << 1) | 0x01; // Add crc delimiter cd->parse_crc_bits = (crc_bits << 1) | 0x01; // Add crc delimiter
cd->parse_crc_pos = crcstart_bitpos + crc_bitcount + 1; cd->parse_crc_pos = crcstart_bitpos + crc_bitcount + 1;
report_note_crc_start(cd); int ret = report_note_crc_start(cd);
if (ret) {
data_state_go_discard(cd);
return;
}
data_state_go_next(cd, MS_CRC, 16); data_state_go_next(cd, MS_CRC, 16);
} }
@ -1241,7 +1261,7 @@ can2040_transmit(struct can2040 *cd, struct can2040_msg *msg)
crc = crc_bytes(crc, hdr, 3); crc = crc_bytes(crc, hdr, 3);
bs_push(&bs, hdr, 19); bs_push(&bs, hdr, 19);
} }
int i; uint32_t i;
for (i=0; i<data_len; i++) { for (i=0; i<data_len; i++) {
uint32_t v = qt->msg.data[i]; uint32_t v = qt->msg.data[i];
crc = crc_byte(crc, v); crc = crc_byte(crc, v);
@ -1256,6 +1276,7 @@ can2040_transmit(struct can2040 *cd, struct can2040_msg *msg)
writel(&cd->tx_push_pos, tx_push_pos + 1); writel(&cd->tx_push_pos, tx_push_pos + 1);
// Wakeup if in TS_IDLE state // Wakeup if in TS_IDLE state
__DMB();
pio_signal_set_txpending(cd); pio_signal_set_txpending(cd);
return 0; return 0;