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https://github.com/andreili/katapult.git
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lib: sync can2040 with klipper latest
Signed-off-by: Eric Callahan <arksine.code@gmail.com>
This commit is contained in:
Eric Callahan
parent
d0480d26d6
commit
67020a492f
@ -76,21 +76,21 @@ rp2040_gpio_peripheral(uint32_t gpio, int func, int pull_up)
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#define can2040_offset_shared_rx_read 13u
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#define can2040_offset_shared_rx_end 15u
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#define can2040_offset_match_load_next 18u
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#define can2040_offset_tx_conflict 24u
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#define can2040_offset_match_end 25u
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#define can2040_offset_tx_got_recessive 25u
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#define can2040_offset_tx_start 26u
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#define can2040_offset_tx_conflict 31u
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#define can2040_offset_tx_write_pin 27u
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static const uint16_t can2040_program_instructions[] = {
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0x0085, // 0: jmp y--, 5
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0x0048, // 1: jmp x--, 8
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0xe12a, // 2: set x, 10 [1]
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0xe029, // 2: set x, 9
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0x00cc, // 3: jmp pin, 12
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0xc000, // 4: irq nowait 0
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0x00c0, // 5: jmp pin, 0
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0xc040, // 6: irq clear 0
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0xe229, // 7: set x, 9 [2]
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0xf242, // 8: set y, 2 [18]
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0xe429, // 7: set x, 9 [4]
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0xf043, // 8: set y, 3 [16]
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0xc104, // 9: irq nowait 4 [1]
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0x03c5, // 10: jmp pin, 5 [3]
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0x0307, // 11: jmp 7 [3]
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@ -98,7 +98,7 @@ static const uint16_t can2040_program_instructions[] = {
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0x20c4, // 13: wait 1 irq, 4
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0x4001, // 14: in pins, 1
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0xa046, // 15: mov y, isr
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0x00b2, // 16: jmp x != y, 18
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0x01b2, // 16: jmp x != y, 18 [1]
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0xc002, // 17: irq nowait 2
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0x40eb, // 18: in osr, 11
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0x4054, // 19: in y, 20
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@ -107,13 +107,13 @@ static const uint16_t can2040_program_instructions[] = {
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0xa027, // 22: mov x, osr
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0x0098, // 23: jmp y--, 24
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0xa0e2, // 24: mov osr, y
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0xa242, // 25: nop [2]
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0x6021, // 26: out x, 1
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0xa001, // 27: mov pins, x
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0x20c4, // 28: wait 1 irq, 4
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0x00d9, // 29: jmp pin, 25
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0x023a, // 30: jmp !x, 26 [2]
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0xc027, // 31: irq wait 7
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0x6021, // 25: out x, 1
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0x00df, // 26: jmp pin, 31
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0xb801, // 27: mov pins, x [24]
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0x02d9, // 28: jmp pin, 25 [2]
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0x0058, // 29: jmp x--, 24
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0x6021, // 30: out x, 1
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0x011b, // 31: jmp 27 [1]
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};
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// Local names for PIO state machine IRQs
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@ -138,7 +138,7 @@ pio_sync_setup(struct can2040 *cd)
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| cd->gpio_rx << PIO_SM0_PINCTRL_SET_BASE_LSB);
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sm->instr = 0xe080; // set pindirs, 0
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sm->pinctrl = 0;
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pio_hw->txf[0] = PIO_CLOCK_PER_BIT / 2 * 7 - 5 - 1;
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pio_hw->txf[0] = 9 + 6 * PIO_CLOCK_PER_BIT / 2;
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sm->instr = 0x80a0; // pull block
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sm->instr = can2040_offset_sync_entry; // jmp sync_entry
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}
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@ -183,7 +183,10 @@ pio_tx_setup(struct can2040 *cd)
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{
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pio_hw_t *pio_hw = cd->pio_hw;
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struct pio_sm_hw *sm = &pio_hw->sm[3];
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sm->execctrl = cd->gpio_rx << PIO_SM0_EXECCTRL_JMP_PIN_LSB;
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sm->execctrl = (
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cd->gpio_rx << PIO_SM0_EXECCTRL_JMP_PIN_LSB
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| can2040_offset_tx_conflict << PIO_SM0_EXECCTRL_WRAP_TOP_LSB
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| can2040_offset_tx_conflict << PIO_SM0_EXECCTRL_WRAP_BOTTOM_LSB);
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sm->shiftctrl = (PIO_SM0_SHIFTCTRL_FJOIN_TX_BITS
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| PIO_SM0_SHIFTCTRL_AUTOPULL_BITS);
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sm->pinctrl = (1 << PIO_SM0_PINCTRL_SET_COUNT_LSB
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@ -247,6 +250,7 @@ static void
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pio_tx_reset(struct can2040 *cd)
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{
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pio_hw_t *pio_hw = cd->pio_hw;
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pio_hw->ctrl = 0x07 << PIO_CTRL_SM_ENABLE_LSB;
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pio_hw->ctrl = ((0x07 << PIO_CTRL_SM_ENABLE_LSB)
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| (0x08 << PIO_CTRL_SM_RESTART_LSB));
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pio_hw->irq = (SI_MATCHED | SI_ACKDONE) >> 8; // clear PIO irq flags
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@ -255,9 +259,6 @@ pio_tx_reset(struct can2040 *cd)
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sm->shiftctrl = 0;
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sm->shiftctrl = (PIO_SM0_SHIFTCTRL_FJOIN_TX_BITS
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| PIO_SM0_SHIFTCTRL_AUTOPULL_BITS);
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// Must reset again after clearing fifo
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pio_hw->ctrl = ((0x07 << PIO_CTRL_SM_ENABLE_LSB)
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| (0x08 << PIO_CTRL_SM_RESTART_LSB));
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}
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// Queue a message for transmission on PIO "tx" state machine
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@ -266,13 +267,14 @@ pio_tx_send(struct can2040 *cd, uint32_t *data, uint32_t count)
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{
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pio_hw_t *pio_hw = cd->pio_hw;
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pio_tx_reset(cd);
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pio_hw->instr_mem[can2040_offset_tx_got_recessive] = 0xa242; // nop [2]
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int i;
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pio_hw->instr_mem[can2040_offset_tx_got_recessive] = 0x6021; // out x, 1
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uint32_t i;
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for (i=0; i<count; i++)
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pio_hw->txf[3] = data[i];
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struct pio_sm_hw *sm = &pio_hw->sm[3];
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sm->instr = 0xe001; // set pins, 1
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sm->instr = can2040_offset_tx_start; // jmp tx_start
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sm->instr = 0x6021; // out x, 1
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sm->instr = can2040_offset_tx_write_pin; // jmp tx_write_pin
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sm->instr = 0x20c0; // wait 1 irq, 0
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pio_hw->ctrl = 0x0f << PIO_CTRL_SM_ENABLE_LSB;
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}
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@ -287,7 +289,8 @@ pio_tx_inject_ack(struct can2040 *cd, uint32_t match_key)
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pio_hw->txf[3] = 0x7fffffff;
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struct pio_sm_hw *sm = &pio_hw->sm[3];
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sm->instr = 0xe001; // set pins, 1
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sm->instr = can2040_offset_tx_start; // jmp tx_start
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sm->instr = 0x6021; // out x, 1
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sm->instr = can2040_offset_tx_write_pin; // jmp tx_write_pin
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sm->instr = 0x20c2; // wait 1 irq, 2
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pio_hw->ctrl = 0x0f << PIO_CTRL_SM_ENABLE_LSB;
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@ -351,7 +354,7 @@ pio_sm_setup(struct can2040 *cd)
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pio_signal_set_txpending(cd);
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// Load pio program
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int i;
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uint32_t i;
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for (i=0; i<ARRAY_SIZE(can2040_program_instructions); i++)
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pio_hw->instr_mem[i] = can2040_program_instructions[i];
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@ -436,9 +439,9 @@ static inline uint32_t
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crc_bytes(uint32_t crc, uint32_t data, uint32_t num)
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{
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switch (num) {
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default: crc = crc_byte(crc, data >> 24);
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case 3: crc = crc_byte(crc, data >> 16);
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case 2: crc = crc_byte(crc, data >> 8);
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default: crc = crc_byte(crc, data >> 24); /* FALLTHRU */
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case 3: crc = crc_byte(crc, data >> 16); /* FALLTHRU */
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case 2: crc = crc_byte(crc, data >> 8); /* FALLTHRU */
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case 1: crc = crc_byte(crc, data);
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}
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return crc;
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@ -647,14 +650,19 @@ tx_schedule_transmit(struct can2040 *cd)
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if (cd->tx_state == TS_QUEUED && !pio_tx_did_fail(cd))
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// Already queued or actively transmitting
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return 0;
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if (cd->tx_push_pos == cd->tx_pull_pos) {
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uint32_t tx_pull_pos = cd->tx_pull_pos;
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if (readl(&cd->tx_push_pos) == tx_pull_pos) {
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// No new messages to transmit
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cd->tx_state = TS_IDLE;
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pio_signal_clear_txpending(cd);
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return SI_TXPENDING;
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__DMB();
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if (likely(readl(&cd->tx_push_pos) == tx_pull_pos))
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return SI_TXPENDING;
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// Raced with can2040_transmit() - msg is now available for transmit
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pio_signal_set_txpending(cd);
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}
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cd->tx_state = TS_QUEUED;
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struct can2040_transmit *qt = &cd->tx_queue[tx_qpos(cd, cd->tx_pull_pos)];
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struct can2040_transmit *qt = &cd->tx_queue[tx_qpos(cd, tx_pull_pos)];
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pio_tx_send(cd, qt->stuffed_data, qt->stuffed_words);
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return 0;
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}
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@ -675,8 +683,11 @@ tx_check_local_message(struct can2040 *cd)
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return 0;
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struct can2040_transmit *qt = &cd->tx_queue[tx_qpos(cd, cd->tx_pull_pos)];
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struct can2040_msg *pm = &cd->parse_msg, *tm = &qt->msg;
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if (qt->crc == cd->parse_crc && tm->id == pm->id && tm->dlc == pm->dlc
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&& tm->data32[0] == pm->data32[0] && tm->data32[1] == pm->data32[1]) {
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if (tm->id == pm->id) {
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if (qt->crc != cd->parse_crc || tm->dlc != pm->dlc
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|| tm->data32[0] != pm->data32[0] || tm->data32[1] != pm->data32[1])
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// Message with same id that differs in content - an error
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return -1;
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// This is a self transmit
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cd->tx_state = TS_CONFIRM_TX;
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return 1;
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@ -717,7 +728,7 @@ report_callback_rx_msg(struct can2040 *cd)
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static void
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report_callback_tx_msg(struct can2040 *cd)
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{
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cd->tx_pull_pos++;
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writel(&cd->tx_pull_pos, cd->tx_pull_pos + 1);
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cd->rx_cb(cd, CAN2040_NOTIFY_TX, &cd->parse_msg);
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}
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@ -752,22 +763,25 @@ report_note_message_start(struct can2040 *cd)
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}
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// Setup for ack injection (if receiving) or ack confirmation (if transmit)
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static void
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static int
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report_note_crc_start(struct can2040 *cd)
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{
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int ret = tx_check_local_message(cd);
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if (ret) {
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if (ret < 0)
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return -1;
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// This is a self transmit - setup tx eof "matched" signal
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cd->report_state = RS_NEED_TX_ACK;
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uint32_t bits = (cd->parse_crc_bits << 9) | 0x0ff;
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pio_match_check(cd, pio_match_calc_key(bits, cd->parse_crc_pos + 9));
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return;
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return 0;
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}
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// Setup for ack inject (after rx fifos fully drained)
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cd->report_state = RS_NEED_RX_ACK;
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pio_signal_set_txpending(cd);
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pio_irq_set(cd, SI_MAYTX | SI_TXPENDING);
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return 0;
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}
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// Parser successfully found matching crc
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@ -856,7 +870,9 @@ report_line_maytx(struct can2040 *cd)
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static void
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report_line_txpending(struct can2040 *cd)
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{
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if (cd->report_state == RS_NEED_RX_ACK) {
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uint32_t pio_irqs = pio_irq_get(cd);
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if (pio_irqs == (SI_MAYTX | SI_TXPENDING | SI_RX_DATA)
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&& cd->report_state == RS_NEED_RX_ACK) {
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// Ack inject request from report_note_crc_start()
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uint32_t mk = pio_match_calc_key(cd->parse_crc_bits, cd->parse_crc_pos);
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tx_inject_ack(cd, mk);
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@ -866,7 +882,7 @@ report_line_txpending(struct can2040 *cd)
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// Tx request from can2040_transmit(), report_note_eof_success(),
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// or report_note_parse_error().
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uint32_t check_txpending = tx_schedule_transmit(cd);
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pio_irq_set(cd, (pio_irq_get(cd) & ~SI_TXPENDING) | check_txpending);
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pio_irq_set(cd, (pio_irqs & ~SI_TXPENDING) | check_txpending);
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}
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@ -954,7 +970,11 @@ data_state_go_crc(struct can2040 *cd)
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cd->parse_crc_bits = (crc_bits << 1) | 0x01; // Add crc delimiter
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cd->parse_crc_pos = crcstart_bitpos + crc_bitcount + 1;
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report_note_crc_start(cd);
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int ret = report_note_crc_start(cd);
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if (ret) {
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data_state_go_discard(cd);
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return;
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}
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data_state_go_next(cd, MS_CRC, 16);
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}
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@ -1241,7 +1261,7 @@ can2040_transmit(struct can2040 *cd, struct can2040_msg *msg)
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crc = crc_bytes(crc, hdr, 3);
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bs_push(&bs, hdr, 19);
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}
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int i;
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uint32_t i;
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for (i=0; i<data_len; i++) {
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uint32_t v = qt->msg.data[i];
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crc = crc_byte(crc, v);
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@ -1256,6 +1276,7 @@ can2040_transmit(struct can2040 *cd, struct can2040_msg *msg)
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writel(&cd->tx_push_pos, tx_push_pos + 1);
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// Wakeup if in TS_IDLE state
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__DMB();
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pio_signal_set_txpending(cd);
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return 0;
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