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125 lines
4.8 KiB
Diff
125 lines
4.8 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Dan Pasanen <dan.pasanen@gmail.com>
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Date: Thu, 16 Dec 2021 05:17:33 -0500
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Subject: add pcie hack bus-scan-delay-ms
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* build: kernel: rockchip64-[current,edge]: add pcie bus scan delay patches
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These are needed for cards like the LSI SAS2008 which needs a little
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extra time to initialize or they'll cause a kernel panic.
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References:
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https://gitlab.manjaro.org/manjaro-arm/packages/core/linux/-/blob/master/0013-rk3399-rp64-pcie-Reimplement-rockchip-PCIe-bus-scan-delay.patch
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https://gitlab.manjaro.org/manjaro-arm/packages/core/linux/-/blob/master/0022-arm64-dts-rockchip-Add-pcie-bus-scan-delay-to-rockpr.patch
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---
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Documentation/admin-guide/kernel-parameters.txt | 8 +++
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drivers/pci/controller/pcie-rockchip-host.c | 25 ++++++++++
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drivers/pci/controller/pcie-rockchip.c | 6 +++
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drivers/pci/controller/pcie-rockchip.h | 2 +
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4 files changed, 41 insertions(+)
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diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
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index 111111111111..222222222222 100644
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--- a/Documentation/admin-guide/kernel-parameters.txt
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+++ b/Documentation/admin-guide/kernel-parameters.txt
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@@ -4877,6 +4877,14 @@
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nomsi Do not use MSI for native PCIe PME signaling (this makes
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all PCIe root ports use INTx for all services).
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+ pcie_rockchip_host.bus_scan_delay= [PCIE] Delay in ms before
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+ scanning PCIe bus in Rockchip PCIe host driver. Some PCIe
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+ cards seem to need delays that can be several hundred ms.
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+ If set to greater than or equal to 0 this parameter will
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+ override delay that can be set in device tree.
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+ Values less than 0 mean that this parameter is ignored.
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+ default=-1
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+
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pcmv= [HW,PCMCIA] BadgePAD 4
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pd_ignore_unused
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diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
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index 111111111111..222222222222 100644
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--- a/drivers/pci/controller/pcie-rockchip-host.c
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+++ b/drivers/pci/controller/pcie-rockchip-host.c
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@@ -32,10 +32,14 @@
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#include <linux/platform_device.h>
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#include <linux/reset.h>
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#include <linux/regmap.h>
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+#include <linux/moduleparam.h>
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#include "../pci.h"
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#include "pcie-rockchip.h"
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+static int bus_scan_delay = -1;
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+module_param_named(bus_scan_delay, bus_scan_delay, int, S_IRUGO);
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+
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static void rockchip_pcie_enable_bw_int(struct rockchip_pcie *rockchip)
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{
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u32 status;
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@@ -933,6 +937,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
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struct device *dev = &pdev->dev;
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struct pci_host_bridge *bridge;
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int err;
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+ u32 delay = 0;
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if (!dev->of_node)
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return -ENODEV;
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@@ -982,6 +987,26 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
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bridge->sysdata = rockchip;
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bridge->ops = &rockchip_pcie_ops;
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+ /* Checking if bus scan delay was given from command line and prefer
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+ * that over the value in device tree (which defaults to 0 if not set).
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+ */
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+ if (bus_scan_delay >= 0) {
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+ delay = bus_scan_delay;
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+ dev_info(dev, "wait %u ms (from command-line) before bus scan\n", delay);
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+ } else {
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+ delay = rockchip->bus_scan_delay;
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+ dev_info(dev, "wait %u ms (from device tree) before bus scan\n", delay);
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+ }
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+ /* Workaround for some devices crashing on pci_host_probe / pci_scan_root_bus_bridge
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+ * calls: sleep a bit before bus scan. Call trace gets to rockchip_pcie_rd_conf when
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+ * trying to read vendor id (pci_bus_generic_read_dev_vendor_id is in call stack)
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+ * before panicing. I have no idea why this works or what causes the panic. I just
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+ * found this hack by luck when trying to "make it break differently if possible".
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+ */
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+ if (delay > 0) {
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+ msleep(delay);
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+ }
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+
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err = rockchip_pcie_setup_irq(rockchip);
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if (err)
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goto err_remove_irq_domain;
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diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c
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index 111111111111..222222222222 100644
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--- a/drivers/pci/controller/pcie-rockchip.c
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+++ b/drivers/pci/controller/pcie-rockchip.c
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@@ -102,6 +102,12 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
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return dev_err_probe(dev, rockchip->num_clks,
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"failed to get clocks\n");
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+ err = of_property_read_u32(node, "bus-scan-delay-ms", &rockchip->bus_scan_delay);
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+ if (err) {
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+ dev_info(dev, "no bus scan delay, default to 0 ms\n");
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+ rockchip->bus_scan_delay = 0;
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+ }
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+
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return 0;
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}
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EXPORT_SYMBOL_GPL(rockchip_pcie_parse_dt);
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diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
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index 111111111111..222222222222 100644
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--- a/drivers/pci/controller/pcie-rockchip.h
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+++ b/drivers/pci/controller/pcie-rockchip.h
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@@ -351,6 +351,8 @@ struct rockchip_pcie {
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phys_addr_t msg_bus_addr;
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bool is_rc;
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struct resource *mem_res;
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+ /* Bus scan delay is a workaround for some pcie devices causing crashes */
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+ u32 bus_scan_delay;
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};
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static u32 rockchip_pcie_read(struct rockchip_pcie *rockchip, u32 reg)
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--
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Armbian
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