mirror of
https://github.com/andreili/SBC_builder.git
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340 lines
8.3 KiB
Diff
340 lines
8.3 KiB
Diff
From 2c8fcfebe335951a63e1ecb3c8906c919f4ab94c Mon Sep 17 00:00:00 2001
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From: Gunjan Gupta <viraniac@gmail.com>
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Date: Fri, 29 Dec 2023 11:18:33 +0000
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Subject: arm64: dts: h616: add hdmi support for zero2 and zero3
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---
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.../allwinner/sun50i-h616-orangepi-zero.dtsi | 25 ++
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.../allwinner/sun50i-h616-orangepi-zero2.dts | 4 +
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.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 213 ++++++++++++++++++
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3 files changed, 242 insertions(+)
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
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index 061848cf8b13..60f643abb3eb 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
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@@ -23,6 +23,17 @@ chosen {
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stdout-path = "serial0:115200n8";
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};
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+ connector {
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+ compatible = "hdmi-connector";
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+ type = "d";
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+
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+ port {
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+ hdmi_con_in: endpoint {
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+ remote-endpoint = <&hdmi_out_con>;
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+ };
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+ };
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+ };
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+
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leds {
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compatible = "gpio-leds";
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@@ -95,6 +106,10 @@ &codec {
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status = "okay";
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};
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+&de {
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+ status = "okay";
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+};
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+
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&ehci1 {
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status = "okay";
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};
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@@ -115,6 +130,16 @@ &emac0 {
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status = "okay";
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};
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+&hdmi {
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+ status = "okay";
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+};
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+
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+&hdmi_out {
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+ hdmi_out_con: endpoint {
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+ remote-endpoint = <&hdmi_con_in>;
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+ };
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+};
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+
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&mdio0 {
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ext_rgmii_phy: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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index 42c099483fdd..60dd0860f49f 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
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@@ -29,6 +29,10 @@ &gpu {
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status = "okay";
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};
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+&hdmi {
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+ hvcc-supply = <®_bldo1>;
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+};
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+
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&mmc0 {
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vmmc-supply = <®_dcdce>;
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};
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
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index 5c1e2dc77268..564c5853af97 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
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@@ -7,8 +7,11 @@
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#include <dt-bindings/clock/sun50i-h616-ccu.h>
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#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
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#include <dt-bindings/clock/sun6i-rtc.h>
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+#include <dt-bindings/clock/sun8i-de2.h>
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+#include <dt-bindings/clock/sun8i-tcon-top.h>
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#include <dt-bindings/reset/sun50i-h616-ccu.h>
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#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
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+#include <dt-bindings/reset/sun8i-de2.h>
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#include <dt-bindings/thermal/thermal.h>
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/ {
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@@ -94,6 +97,12 @@ l2_cache: l2-cache {
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};
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};
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+ de: display-engine {
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+ compatible = "allwinner,sun50i-h6-display-engine";
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+ allwinner,pipelines = <&mixer0>;
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+ status = "disabled";
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+ };
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+
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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@@ -150,6 +159,50 @@ soc {
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#size-cells = <1>;
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ranges = <0x0 0x0 0x0 0x40000000>;
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+ bus@1000000 {
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+ compatible = "allwinner,sun50i-h616-de33",
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+ "allwinner,sun50i-a64-de2";
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+ reg = <0x1000000 0x400000>;
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+ allwinner,sram = <&de3_sram 1>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges = <0 0x1000000 0x400000>;
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+
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+ display_clocks: clock@8000 {
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+ compatible = "allwinner,sun50i-h616-de33-clk";
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+ reg = <0x8000 0x100>;
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+ clocks = <&ccu CLK_DE>, <&ccu CLK_BUS_DE>;
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+ clock-names = "mod", "bus";
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+ resets = <&ccu RST_BUS_DE>;
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+ #clock-cells = <1>;
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+ #reset-cells = <1>;
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+ };
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+
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+ mixer0: mixer@100000 {
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+ compatible = "allwinner,sun50i-h616-de33-mixer-0";
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+ reg = <0x100000 0x100000>,
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+ <0x8100 0x40>,
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+ <0x280000 0x20000>;
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+ clocks = <&display_clocks CLK_BUS_MIXER0>,
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+ <&display_clocks CLK_MIXER0>;
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+ clock-names = "bus", "mod";
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+ resets = <&display_clocks RST_MIXER0>;
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+
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+ ports {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ mixer0_out: port@1 {
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+ reg = <1>;
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+
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+ mixer0_out_tcon_top_mixer0: endpoint {
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+ remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
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+ };
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+ };
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+ };
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+ };
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+ };
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+
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gpu: gpu@1800000 {
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compatible = "allwinner,sun50i-h616-mali",
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"arm,mali-bifrost";
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@@ -193,12 +246,31 @@ syscon: syscon@3000000 {
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#size-cells = <1>;
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ranges;
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+ sram_a2: sram@100000 {
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+ compatible = "mmio-sram";
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+ reg = <0x00100000 0x18000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges = <0 0x00100000 0x18000>;
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+
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+ scpi_sram: scpi-sram@17c00 {
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+ compatible = "arm,scp-shmem";
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+ reg = <0x17c00 0x200>;
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+ };
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+ };
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+
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sram_c: sram@28000 {
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compatible = "mmio-sram";
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reg = <0x00028000 0x30000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x00028000 0x30000>;
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+
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+ de3_sram: sram-section@0 {
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+ compatible = "allwinner,sun50i-h616-sram-c",
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+ "allwinner,sun50i-a64-sram-c";
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+ reg = <0x0000 0x1e000>;
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+ };
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};
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sram_c1: sram@1a00000 {
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@@ -918,6 +990,147 @@ ohci3: usb@5311400 {
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status = "disabled";
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};
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+ hdmi: hdmi@6000000 {
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+ #sound-dai-cells = <0>;
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+ compatible = "allwinner,sun50i-h616-dw-hdmi",
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+ "allwinner,sun50i-h6-dw-hdmi";
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+ reg = <0x06000000 0x10000>;
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+ reg-io-width = <1>;
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+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
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+ <&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>,
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+ <&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>;
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+ clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
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+ "hdcp-bus";
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+ resets = <&ccu RST_BUS_HDMI>, <&ccu RST_BUS_HDCP>;
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+ reset-names = "ctrl", "hdcp";
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+ phys = <&hdmi_phy>;
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+ phy-names = "phy";
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+ status = "disabled";
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+
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+ ports {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ hdmi_in: port@0 {
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+ reg = <0>;
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+
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+ hdmi_in_tcon_top: endpoint {
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+ remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
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+ };
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+ };
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+
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+ hdmi_out: port@1 {
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+ reg = <1>;
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+ };
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+ };
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+ };
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+
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+ hdmi_phy: hdmi-phy@6010000 {
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+ compatible = "allwinner,sun50i-h616-hdmi-phy";
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+ reg = <0x06010000 0x10000>;
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+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>;
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+ clock-names = "bus", "mod";
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+ resets = <&ccu RST_BUS_HDMI_SUB>;
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+ reset-names = "phy";
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+ #phy-cells = <0>;
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+ };
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+
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+ tcon_top: tcon-top@6510000 {
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+ compatible = "allwinner,sun50i-h6-tcon-top";
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+ reg = <0x06510000 0x1000>;
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+ clocks = <&ccu CLK_BUS_TCON_TOP>,
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+ <&ccu CLK_TCON_TV0>;
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+ clock-names = "bus",
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+ "tcon-tv0";
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+ clock-output-names = "tcon-top-tv0";
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+ resets = <&ccu RST_BUS_TCON_TOP>;
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+ #clock-cells = <1>;
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+
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+ ports {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ tcon_top_mixer0_in: port@0 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <0>;
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+
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+ tcon_top_mixer0_in_mixer0: endpoint@0 {
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+ reg = <0>;
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+ remote-endpoint = <&mixer0_out_tcon_top_mixer0>;
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+ };
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+ };
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+
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+ tcon_top_mixer0_out: port@1 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <1>;
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+
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+ tcon_top_mixer0_out_tcon_tv: endpoint@2 {
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+ reg = <2>;
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+ remote-endpoint = <&tcon_tv_in_tcon_top_mixer0>;
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+ };
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+ };
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+
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+ tcon_top_hdmi_in: port@4 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <4>;
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+
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+ tcon_top_hdmi_in_tcon_tv: endpoint@0 {
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+ reg = <0>;
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+ remote-endpoint = <&tcon_tv_out_tcon_top>;
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+ };
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+ };
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+
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+ tcon_top_hdmi_out: port@5 {
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+ reg = <5>;
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+
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+ tcon_top_hdmi_out_hdmi: endpoint {
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+ remote-endpoint = <&hdmi_in_tcon_top>;
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+ };
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+ };
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+ };
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+ };
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+
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+ tcon_tv: lcd-controller@6515000 {
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+ compatible = "allwinner,sun50i-h6-tcon-tv",
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+ "allwinner,sun8i-r40-tcon-tv";
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+ reg = <0x06515000 0x1000>;
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+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_TCON_TV0>,
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+ <&tcon_top CLK_TCON_TOP_TV0>;
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+ clock-names = "ahb",
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+ "tcon-ch1";
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+ resets = <&ccu RST_BUS_TCON_TV0>;
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+ reset-names = "lcd";
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+
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+ ports {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ tcon_tv_in: port@0 {
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+ reg = <0>;
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+
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+ tcon_tv_in_tcon_top_mixer0: endpoint {
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+ remote-endpoint = <&tcon_top_mixer0_out_tcon_tv>;
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+ };
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+ };
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+
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+ tcon_tv_out: port@1 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <1>;
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+
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+ tcon_tv_out_tcon_top: endpoint@1 {
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+ reg = <1>;
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+ remote-endpoint = <&tcon_top_hdmi_in_tcon_tv>;
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+ };
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+ };
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+ };
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+ };
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+
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rtc: rtc@7000000 {
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compatible = "allwinner,sun50i-h616-rtc";
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reg = <0x07000000 0x400>;
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--
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2.35.3
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