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264 lines
7.2 KiB
Plaintext
264 lines
7.2 KiB
Plaintext
This document describes overlays provided in the kernel packages
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For generic Armbian overlays documentation please see
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https://docs.armbian.com/User-Guide_Allwinner_overlays/
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### Platform:
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rockchip (Rockchip)
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### Provided overlays:
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- i2c7, i2c8, pcie-gen2, spi-spidev, uart4, w1-gpio
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for RK3308 (Rock PI-S)
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- rk3308bs rk3308bs-1.3ghz sdio-10mhz sdio-4mhz emmc
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### Overlay details:
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### mkspi-disable-lcd-spi
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DTBO to disable spi_for_{lcd,touch} when enabling uart1
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### i2c7
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Activates TWI/I2C bus 7
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I2C7 pins (SCL, SDA): GPIO2-B0, GPIO2-A7 GPIO1-C5, GPIO1-C4
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### i2c8
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Activates TWI/I2C bus 8
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I2C8 pins (SCL, SDA): GPIO1-C5, GPIO1-C4
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### pcie-gen2
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Enables PCIe Gen2 link speed on RK3399.
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WARNING! Not officially supported by Rockchip!!!
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### rk3328-i2c0
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Activates TWI/I2C bus 0
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I2C0 (SCL, SDA): GPIO2-D0, GPIO2-D1
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### rk3328-uart1
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Activates UART1
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UART1 pins (RX, TX): GPIO3_A6, GPIO3_A4
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### rk3328-opp-1.4ghz
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Adds the 1.4GHz opp for overclocking
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WARNING! Not officially supported by Rockchip!!!
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### rk3328-opp-1.5ghz
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Adds the 1.5GHz opp for overclocking
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WARNING! Not officially supported by Rockchip!!!
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### rk3399-opp-2ghz
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Adds the 2GHz big and 1.5 GHz LITTLE opps for overclocking
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WARNING! Not officially supported by Rockchip!!!
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### rockpi4cplus-usb-host
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Switches the top USB 3.0 port to host mode.
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WARNING! Not officially supported by Rockchip!!!
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### spi-jedec-nor
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Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus
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supported by the kernel SPI NOR driver
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SPI 0 pins (MOSI, MISO, SCK, CS): GPIO3_A5, GPIO3_A4, GPIO3_A6, GPIO3_A7
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SPI 1 pins (MOSI, MISO, SCK, CS): GPIO1_A7, GPIO1_B0, GPIO1_B1, GPIO1_B2
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SPI 2 pins (MOSI, MISO, SCK, CS): GPIO1_C0, GPIO1_B7, GPIO1_C1, GPIO1_C2
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SPI 3 pins (MOSI, MISO, SCK, CS): GPIO2_B2, GPIO2_B1, GPIO2_B3, GPIO2_B4
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Parameters:
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param_spinor_spi_bus (int)
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SPI bus to activate SPI NOR flash support on
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Required
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Supported values: 0, 1, 2
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param_spinor_max_freq (int)
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Maximum SPI frequency
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Optional
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Default: 1000000
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Range: 3000 - 100000000
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### spi-spidev
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Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access,
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where X is the bus number and Y is the CS number
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SPI 0 pins (MOSI, MISO, SCK, CS): GPIO3_A5, GPIO3_A4, GPIO3_A6, GPIO3_A7
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SPI 1 pins (MOSI, MISO, SCK, CS): GPIO1_A7, GPIO1_B0, GPIO1_B1, GPIO1_B2
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SPI 2 pins (MOSI, MISO, SCK, CS): GPIO1_C0, GPIO1_B7, GPIO1_C1, GPIO1_C2
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SPI 3 pins (MOSI, MISO, SCK, CS): GPIO2_B2, GPIO2_B1, GPIO2_B3, GPIO2_B4
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Parameters:
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param_spidev_spi_bus (int)
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SPI bus to activate SPIdev support on
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Required
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Supported values: 0, 1
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param_spidev_spi_cs (int)
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SPI chip select number
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Optional
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Default: 0
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Supported values: 0, 1
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Using chip select 1 requires using "spi-add-cs1" overlay
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param_spidev_max_freq (int)
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Maximum SPIdev frequency
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Optional
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Default: 1000000
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Range: 3000 - 100000000
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### uart4
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Activates UART4
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UART4 pins (RX, TX): GPIO1_A7, GPIO1_B0
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Notice: UART4 cannot be activated together with SPI1 - they share the sam pins.
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Enabling this overlay disables SPI1.
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### dwc3-0-host
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Forces port 0 of the DesignWare xHCI controller to host mode.
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This can be used on plaforms such as NanoPC-T4, where devices plugged into the
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USB-C port may not be detected otherwise.
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### w1-gpio
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Activates 1-Wire GPIO master
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Requires an external pull-up resistor on the data pin
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or enabling the internal pull-up
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### rk3318-box-led-conf1
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Activates led/gpio configuration for rk3318 tv box boards with signature
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YX_RK3328 and clones
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### rk3318-box-led-conf2
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Activates led/gpio configuration for rk3318 tv box boards withs signature
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X88_PRO_B and clones
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### rk3318-box-led-conf3
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This device tree overlay is suitable for MXQ-RK3328-D4_A board which
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has an integrated PMIC (RK805). The dtbo is very important to achieve
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1.3 Ghz speed for CPU and stable voltages for other parts of the
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system. Also enables gpio leds and keys.
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### rk3318-box-led-conf4
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Generic rk3318-box configuration but with sdio chip on sdmmc-ext connector
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### rk3318-box-emmc-ddr
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Activates eMMC DDR capability for rk3318 tv box boards. Probably all the eMMC chips
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nowadays support DDR mode, but its reliability heavily depends upon the quality
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of board wiring
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### rk3318-box-emmc-hs200
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Activates eMMC HS200 capability for rk3318 tv box boards.
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It should in autodetect mode, but some board have faulty or cheap circuitry that
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enable the mode but then it doesn't work correctly.
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### rk3318-box-wlan-ap6334
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Set up additional device tree bits to properly support ap6334 (broadcom BCM4334)
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wifi chip and clones
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### rk3318-box-wlan-ext
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Use sdmmc_ext device for sdio devices, enabled wifi on some boards (notably
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X88 Pro) which have wifi chip attached to sdmmc_ext controller.
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### rk3318-box-wlan-ap6330
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Set up additional device tree bits properly support ap6330 (broaccom BCM4330)
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wifi + bt chip and clones.
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### rk3318-box-cpu-hs
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Enable additional cpu "high-speed" bins up to 1.3ghz
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**********************************
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Details for Rock Pi-S overlays (2 Mar 2024):
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Older V1.1 and V1.2 boards use the B variant of the RK3308.
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Some V1.3 boards manufactured after October 2023 also use the B variant.
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To overclock the RK3308B, apply:
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### rk3308-b@1.3ghz
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V1.3 boards produced during 2022 and most of 2023 use the lower voltage
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B-S variant of the RK3308.
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Per Radxa, these chips will be marked RK3308BS instead of RK3308B
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All boards utilizing the RK3308B-S part should apply the:
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### rk3308-bs
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overlay to operate at the appropriate (lower) the core voltage.
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This overlay also enables operation at 1.1Ghz.
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Optionally, boards utilizing the RK3308B-S parts may add the
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### rk3308-bs@1.3ghz
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to overclock the B-S CPU to 1.3Ghz.
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Apply the rk3308-bs@1.3Ghz overlay *after applying* rk3308-bs
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Applying the *-bs overlays to the B variant of the SOC may result in
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unstable operation due to undervolting.
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Applying the rk3308-b@1.3ghz to a BS variant chip consumes more power and
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has the potential to damage the SOC due to overvolting.
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===== For Older Kernels ======
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Install the following overlays only on older (unpatched) mainline kernels:
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Older mainline kernels disable the Rock Pi S built-in SDNAND (EMMC)
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### rk3308-emmc
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enables your SDNAND chip. It is OK to install for boards that lack the SDNAND.
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The legacy 4.4 and this mainline kernel drive the SDIO clock at 50Mhz to provide
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maximum WiFi throughput. However...
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Older versions of the Mainline kernel drive the SDIO clock at only 1Mhz
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This reduces WiFi throughput to < 500kB/s !
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### rk3308-sdio@10mhz
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increases the SDIO clock to 10Mhz, providing about 2.4MB/s WiFi throughput.
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### rk3308-sdio@4mhz
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increases the SDIO clock to only 4Mhz, providing about 1MB/s WiFi throughput.
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use this only if 10Mhz SDIO clock is unstable
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Note that older mainline kernels cannot drive the SDIO clock faster than 10Mhz.
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**********************************
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Details for Rock S0 overlays (10 Apr 2024):
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By default, the internal WiFi selects its internal chip antenna.
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This antenna is so noisy as to be nearly unusable.
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The external antenna, fortunately, works quite well.
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Connect an external WiFi antenna and select it with:
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### rk3308-s0-ext-antenna
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All Rock S0 boards use the RK3308B chip.
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The:
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### rk3308-b@1.3ghz
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overlay enables (overclocked) operation at 1.3ghz
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1.3Ghz operation appears stable on the two boards I've tested.
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The legacy kernel is not supported on the Rock S0
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