SBC_builder/patch/kernel/rockchip64-6.14/board-orangepi-rk3399-pcie.patch
2025-06-01 01:05:27 +02:00

69 lines
1.7 KiB
Diff

From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: amazingfate <liujianfeng1994@gmail.com>
Date: Thu, 18 Apr 2024 00:42:13 +0800
Subject: arm64: dts: rockchip: add pcie support to orangepi rk3399 board
---
arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 31 ++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
@@ -123,6 +123,17 @@ vcc3v0_sd: regulator-vcc3v0-sd {
vin-supply = <&vcc3v3_sys>;
};
+ vcc3v3_pcie: regulator-vcc3v3-pcie {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 2 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_drv>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc3v3_pcie";
+ };
+
vcc3v3_sys: regulator-vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
@@ -587,6 +598,20 @@ &io_domains {
gpio1830-supply = <&vcc_3v0>;
};
+&pcie_phy {
+ status = "okay";
+ assigned-clocks = <&cru 138>;
+ assigned-clock-parents = <&cru 167>;
+ assigned-clock-rates = <100000000>;
+};
+
+&pcie0 {
+ status = "okay";
+ ep-gpios = <&gpio2 4 0>;
+ num-lanes = <4>;
+ max-link-speed = <1>;
+};
+
&pmu_io_domains {
status = "okay";
pmu1830-supply = <&vcc_3v0>;
@@ -609,6 +634,12 @@ phy_rstb: phy-rstb {
};
};
+ pcie {
+ pcie_drv: pcie-drv {
+ rockchip,pins = <0 2 0 &pcfg_pull_none>;
+ };
+ };
+
pmic {
cpu_b_sleep: cpu-b-sleep {
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
--
Armbian