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SBC_builder/patch/uboot/btt/btt_pi2_support.patch
andreili 78b618e671 Add support to build merged kernel
2025-06-28 22:21:33 +02:00

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diff '--color=auto' -Naur uboot_btt_pi2_or/arch/arm/dts/rk3566-btt-pi2.dts uboot_btt_pi2/arch/arm/dts/rk3566-btt-pi2.dts
--- uboot_btt_pi2_or/arch/arm/dts/rk3566-btt-pi2.dts 1970-01-01 01:00:00.000000000 +0100
+++ uboot_btt_pi2/arch/arm/dts/rk3566-btt-pi2.dts 2024-12-25 14:33:13.750360443 +0100
@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include <arm64/rockchip/rk3566-btt-pi2.dts>
diff '--color=auto' -Naur uboot_btt_pi2_or/arch/arm/dts/rk3566-btt-pi2.dtsi uboot_btt_pi2/arch/arm/dts/rk3566-btt-pi2.dtsi
--- uboot_btt_pi2_or/arch/arm/dts/rk3566-btt-pi2.dtsi 1970-01-01 01:00:00.000000000 +0100
+++ uboot_btt_pi2/arch/arm/dts/rk3566-btt-pi2.dtsi 2024-12-25 14:33:00.070527818 +0100
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rk356x-u-boot.dtsi"
+
+&gpio4 {
+ bootph-pre-ram;
+};
+
+&sfc {
+ flash@0 {
+ bootph-pre-ram;
+ bootph-some-ram;
+ };
+};
diff '--color=auto' -Naur uboot_btt_pi2_or/arch/arm/mach-rockchip/rk3568/Kconfig uboot_btt_pi2/arch/arm/mach-rockchip/rk3568/Kconfig
--- uboot_btt_pi2_or/arch/arm/mach-rockchip/rk3568/Kconfig 2025-06-27 23:33:08.241020412 +0200
+++ uboot_btt_pi2/arch/arm/mach-rockchip/rk3568/Kconfig 2025-06-27 23:43:47.734346143 +0200
@@ -59,6 +59,9 @@
help
Xunlong Orange Pi 3B single board computer with a RK3566 SoC.
+config TARGET_BTT_PI2_RK3566
+ bool "BigTreeTech Pi2 RK3566"
+
endchoice
config ROCKCHIP_BOOT_MODE_REG
@@ -82,6 +85,7 @@
source "board/qnap/ts433/Kconfig"
source "board/radxa/zero3-rk3566/Kconfig"
source "board/xunlong/orangepi-3b-rk3566/Kconfig"
+source "board/btt/btt_pi2/Kconfig"
config SYS_CONFIG_NAME
default "rk3568_common"
diff '--color=auto' -Naur uboot_btt_pi2_or/board/btt/btt_pi2/Kconfig uboot_btt_pi2/board/btt/btt_pi2/Kconfig
--- uboot_btt_pi2_or/board/btt/btt_pi2/Kconfig 1970-01-01 01:00:00.000000000 +0100
+++ uboot_btt_pi2/board/btt/btt_pi2/Kconfig 2024-12-25 14:25:26.079527781 +0100
@@ -0,0 +1,12 @@
+if TARGET_BTT_PI2_RK3566
+
+config SYS_BOARD
+ default "btt-pi2-rk3566"
+
+config SYS_VENDOR
+ default "BTT"
+
+config SYS_CONFIG_NAME
+ default "evb_rk3568"
+
+endif
diff '--color=auto' -Naur uboot_btt_pi2_or/board/btt/btt_pi2/Makefile uboot_btt_pi2/board/btt/btt_pi2/Makefile
--- uboot_btt_pi2_or/board/btt/btt_pi2/Makefile 1970-01-01 01:00:00.000000000 +0100
+++ uboot_btt_pi2/board/btt/btt_pi2/Makefile 2024-12-25 13:51:22.905431308 +0100
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y += btt_pi2.o
diff '--color=auto' -Naur uboot_btt_pi2_or/board/btt/btt_pi2/btt_pi2.c uboot_btt_pi2/board/btt/btt_pi2/btt_pi2.c
--- uboot_btt_pi2_or/board/btt/btt_pi2/btt_pi2.c 1970-01-01 01:00:00.000000000 +0100
+++ uboot_btt_pi2/board/btt/btt_pi2/btt_pi2.c 2024-12-25 13:54:26.633161139 +0100
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <env.h>
+#include <asm/gpio.h>
+
+struct board_model {
+ int value;
+ const char *fdtfile;
+ const char *config;
+};
+
+static const struct board_model board_models[] = {
+ { 0, "btt/rk3566-btt-pi2-v1.0.1.dtb", "rk3566-btt-pi2-v1.0.1.dtb" },
+};
+
+static int get_board_value(void)
+{
+ struct gpio_desc desc;
+ int ret;
+
+ /*
+ * GPIO4_C4 (E20):
+ * v1.1.1: x (internal pull-down)
+ * v2.1: PHY_RESET (external pull-up)
+ */
+ ret = dm_gpio_lookup_name("E20", &desc);
+ if (ret)
+ return ret;
+
+ ret = dm_gpio_request(&desc, "phy_reset");
+ if (ret && ret != -EBUSY)
+ return ret;
+
+ dm_gpio_set_dir_flags(&desc, GPIOD_IS_IN);
+ ret = dm_gpio_get_value(&desc);
+ dm_gpio_free(desc.dev, &desc);
+
+ return ret;
+}
+
+static const struct board_model *get_board_model(void)
+{
+ int i, val;
+
+ val = get_board_value();
+ if (val < 0)
+ return NULL;
+
+ for (i = 0; i < ARRAY_SIZE(board_models); i++) {
+ if (val == board_models[i].value)
+ return &board_models[i];
+ }
+
+ return NULL;
+}
+
+int rk_board_late_init(void)
+{
+ const struct board_model *model = get_board_model();
+
+ if (model)
+ env_set("fdtfile", model->fdtfile);
+
+ return 0;
+}
+
+int board_fit_config_name_match(const char *name)
+{
+ const struct board_model *model = get_board_model();
+
+ if (model && (!strcmp(name, model->fdtfile) ||
+ !strcmp(name, model->config)))
+ return 0;
+
+ return -EINVAL;
+}
diff '--color=auto' -Naur uboot_btt_pi2_or/configs/btt-pi2_defconfig uboot_btt_pi2/configs/btt-pi2_defconfig
--- uboot_btt_pi2_or/configs/btt-pi2_defconfig 1970-01-01 01:00:00.000000000 +0100
+++ uboot_btt_pi2/configs/btt-pi2_defconfig 2024-12-25 15:26:35.465317423 +0100
@@ -0,0 +1,98 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO=y
+CONFIG_SF_DEFAULT_SPEED=24000000
+CONFIG_SF_DEFAULT_MODE=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-generic"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
+CONFIG_SPL_SERIAL=y
+CONFIG_TARGET_BTT_PI2_RK3566=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_SF_DEFAULT_BUS=4
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_PCI=y
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-btt-pi2.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+# CONFIG_OF_UPSTREAM is not set
+CONFIG_OF_LIST="rk3568-generic"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SCSI_AHCI=y
+CONFIG_AHCI_PCI=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XMC=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_FAN53555=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_SPL_RAM=y
+CONFIG_SCSI=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_ERRNO_STR=y
diff '--color=auto' -Naur uboot_btt_pi2_or/dts/upstream/src/arm64/rockchip/rk3566-btt-pi2.dts uboot_btt_pi2/dts/upstream/src/arm64/rockchip/rk3566-btt-pi2.dts
--- uboot_btt_pi2_or/dts/upstream/src/arm64/rockchip/rk3566-btt-pi2.dts 1970-01-01 01:00:00.000000000 +0100
+++ uboot_btt_pi2/dts/upstream/src/arm64/rockchip/rk3566-btt-pi2.dts 2024-12-25 14:03:08.870311329 +0100
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3566-btt-pi2.dtsi"
+
+/ {
+ model = "BigTreeTech Pi2 RK3566";
+ compatible = "btt,pi2", "rockchip,rk3566";
+
+ vccio_phy1: regulator-1v8-vccio-phy {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_phy1";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ };
+};
+
+&pmu_io_domains {
+ vccio5-supply = <&vccio_phy1>;
+};
+
+&gmac1 {
+ phy-handle = <&rgmii_phy1>;
+ status = "okay";
+};
+
+&mdio1 {
+ rgmii_phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <50000>;
+ reset-gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&sdmmc1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PD6 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_wake_host_h>;
+ };
+};
+
+&uart1 {
+ bluetooth {
+ compatible = "brcm,bcm4345c5";
+ clocks = <&rk809 1>;
+ clock-names = "lpo";
+ interrupt-parent = <&gpio2>;
+ interrupts = <RK_PC0 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host-wakeup";
+ device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_reg_on_h &bt_wake_host_h &host_wake_bt_h>;
+ vbat-supply = <&vcc_3v3>;
+ vddio-supply = <&vcc_1v8>;
+ };
+};
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