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SBC_builder/tmp/rk3566-bigtreetech-cb2.dtsi
andreili 1fee53d5f5 Add a temporary RK3566 DT files
2025-07-24 23:33:47 +02:00

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/soc/rockchip,vop2.h>
#include <dt-bindings/leds/common.h>
#include "rk3566.dtsi"
/ {
aliases {
ethernet0 = &gmac1;
mmc0 = &sdhci;
mmc1 = &sdmmc0;
};
chosen: chosen {
stdout-path = "serial2:1500000n8";
};
ext_cam_clk: clock-25000000-cam {
compatible = "fixed-clock";
clock-frequency = <25000000>;
clock-output-names = "ext_cam_clk";
#clock-cells = <0>;
};
can_mcp2515_osc: clock-8000000-mcp2515 {
compatible = "fixed-clock";
clock-frequency = <8000000>;
#clock-cells = <0>;
};
leds: leds {
compatible = "gpio-leds";
led-0 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_POWER;
gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
pinctrl-names = "default";
pinctrl-0 =<&blue_led>;
};
led-1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_HEARTBEAT;
gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 =<&heartbeat_led>;
};
};
fan: pwm-fan {
compatible = "pwm-fan";
#cooling-cells = <2>;
cooling-levels = <0 50 100 150 200 255>;
pwms = <&pwm7 0 50000 0>;
};
rk809-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "Analog RK809";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&i2s1_8ch>;
};
simple-audio-card,codec {
sound-dai = <&rk809>;
};
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk809 1>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
post-power-on-delay-ms = <200>;
reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
};
vbus: regulator-vbus {
compatible = "regulator-fixed";
regulator-name = "vbus";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc12v_dcin: regulator-vcc12v-dcin {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
vcc3v3_pcie: regulator-vcc3v3-pcie {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie";
enable-active-high;
gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_drv>;
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc12v_dcin>;
};
vcc3v3_sys: regulator-vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vbus>;
};
vcc5v0_host: regulator-vcc5v0-host {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
regulator-name = "vcc5v0_host3";
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc5v0_otg: regulator-vcc5v0-otg {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_otg_en>;
regulator-name = "vcc5v0_otg3";
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc5v0_sys: regulator-vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vbus>;
};
vcc5v0_usb: regulator-vcc5v0-usb {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_usb";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vbus>;
};
vcc5v0_usb2b: regulator-vcc5v0-usb2b {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_usb2b_en>;
regulator-name = "vcc5v0_usb2b";
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc5v0_usb2t: regulator-vcc5v0-usb2t {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_usb2t_en>;
regulator-name = "vcc5v0_usb2t";
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc_5v: regulator-vcc-5v {
compatible = "regulator-fixed";
regulator-name = "vcc_5v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
vcc_sd: regulator-vcc-sd {
compatible = "regulator-fixed";
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "vcc_sd";
vin-supply = <&vcc3v3_sys>;
};
ddr3_params: ddr3-params {
version = <0x100>;
expanded_version = <0x00>;
reserved = <0x00>;
freq_0 = <0x420>;
freq_1 = <0x144>;
freq_2 = <0x210>;
freq_3 = <0x30c>;
freq_4 = <0x00>;
freq_5 = <0x00>;
pd_idle = <0x0d>;
sr_idle = <0x5d>;
sr_mc_gate_idle = <0x00>;
srpd_lite_idle = <0x00>;
standby_idle = <0x00>;
pd_dis_freq = <0x42a>;
sr_dis_freq = <0x320>;
dram_dll_dis_freq = <0x12c>;
phy_dll_dis_freq = <0x00>;
phy_dq_drv_odten = <0x21>;
phy_ca_drv_odten = <0x21>;
phy_clk_drv_odten = <0x21>;
dram_dq_drv_odten = <0x22>;
phy_dq_drv_odtoff = <0x21>;
phy_ca_drv_odtoff = <0x21>;
phy_clk_drv_odtoff = <0x21>;
dram_dq_drv_odtoff = <0x22>;
dram_odt = <0x78>;
phy_odt = <0xa7>;
phy_odt_puup_en = <0x01>;
phy_odt_pudn_en = <0x01>;
dram_dq_odt_en_freq = <0x14d>;
phy_odt_en_freq = <0x14d>;
phy_dq_sr_odten = <0x0f>;
phy_ca_sr_odten = <0x03>;
phy_clk_sr_odten = <0x00>;
phy_dq_sr_odtoff = <0x0f>;
phy_ca_sr_odtoff = <0x03>;
phy_clk_sr_odtoff = <0x00>;
ssmod_downspread = <0x00>;
ssmod_div = <0x00>;
ssmod_spread = <0x00>;
mode_2t = <0x00>;
speed_bin = <0x15>;
dram_ext_temp = <0x00>;
byte_map = <0xe4>;
dq_map_cs0_dq_l = <0x00>;
dq_map_cs0_dq_h = <0x00>;
dq_map_cs1_dq_l = <0x00>;
dq_map_cs1_dq_h = <0x00>;
};
ddr4_params: ddr4-params {
version = <0x100>;
expanded_version = <0x00>;
reserved = <0x00>;
freq_0 = <0x420>;
freq_1 = <0x144>;
freq_2 = <0x210>;
freq_3 = <0x30c>;
freq_4 = <0x00>;
freq_5 = <0x00>;
pd_idle = <0x0d>;
sr_idle = <0x5d>;
sr_mc_gate_idle = <0x00>;
srpd_lite_idle = <0x00>;
standby_idle = <0x00>;
pd_dis_freq = <0x42a>;
sr_dis_freq = <0x320>;
dram_dll_dis_freq = <0x271>;
phy_dll_dis_freq = <0x00>;
phy_dq_drv_odten = <0x25>;
phy_ca_drv_odten = <0x25>;
phy_clk_drv_odten = <0x25>;
dram_dq_drv_odten = <0x22>;
phy_dq_drv_odtoff = <0x25>;
phy_ca_drv_odtoff = <0x25>;
phy_clk_drv_odtoff = <0x25>;
dram_dq_drv_odtoff = <0x22>;
dram_odt = <0x78>;
phy_odt = <0x8b>;
phy_odt_puup_en = <0x01>;
phy_odt_pudn_en = <0x01>;
dram_dq_odt_en_freq = <0x1f4>;
phy_odt_en_freq = <0x1f4>;
phy_dq_sr_odten = <0x0e>;
phy_ca_sr_odten = <0x01>;
phy_clk_sr_odten = <0x01>;
phy_dq_sr_odtoff = <0x0e>;
phy_ca_sr_odtoff = <0x01>;
phy_clk_sr_odtoff = <0x01>;
ssmod_downspread = <0x00>;
ssmod_div = <0x00>;
ssmod_spread = <0x00>;
mode_2t = <0x00>;
speed_bin = <0x0c>;
dram_ext_temp = <0x00>;
byte_map = <0xe4>;
dq_map_cs0_dq_l = <0x22777788>;
dq_map_cs0_dq_h = <0xd7888877>;
dq_map_cs1_dq_l = <0x22777788>;
dq_map_cs1_dq_h = <0xd7888877>;
};
lpddr3_params: lpddr3-params {
version = <0x100>;
expanded_version = <0x00>;
reserved = <0x00>;
freq_0 = <0x420>;
freq_1 = <0x144>;
freq_2 = <0x210>;
freq_3 = <0x30c>;
freq_4 = <0x00>;
freq_5 = <0x00>;
pd_idle = <0x0d>;
sr_idle = <0x5d>;
sr_mc_gate_idle = <0x00>;
srpd_lite_idle = <0x00>;
standby_idle = <0x00>;
pd_dis_freq = <0x42a>;
sr_dis_freq = <0x320>;
dram_dll_dis_freq = <0x00>;
phy_dll_dis_freq = <0x00>;
phy_dq_drv_odten = <0x25>;
phy_ca_drv_odten = <0x25>;
phy_clk_drv_odten = <0x27>;
dram_dq_drv_odten = <0x22>;
phy_dq_drv_odtoff = <0x25>;
phy_ca_drv_odtoff = <0x25>;
phy_clk_drv_odtoff = <0x27>;
dram_dq_drv_odtoff = <0x22>;
dram_odt = <0x78>;
phy_odt = <0x94>;
phy_odt_puup_en = <0x01>;
phy_odt_pudn_en = <0x01>;
dram_dq_odt_en_freq = <0x14d>;
phy_odt_en_freq = <0x14d>;
phy_dq_sr_odten = <0x0f>;
phy_ca_sr_odten = <0x01>;
phy_clk_sr_odten = <0x0f>;
phy_dq_sr_odtoff = <0x0f>;
phy_ca_sr_odtoff = <0x01>;
phy_clk_sr_odtoff = <0x0f>;
ssmod_downspread = <0x00>;
ssmod_div = <0x00>;
ssmod_spread = <0x00>;
mode_2t = <0x00>;
speed_bin = <0x00>;
dram_ext_temp = <0x00>;
byte_map = <0x8d>;
dq_map_cs0_dq_l = <0x00>;
dq_map_cs0_dq_h = <0x00>;
dq_map_cs1_dq_l = <0x00>;
dq_map_cs1_dq_h = <0x00>;
};
lpddr4_params: lpddr4-params {
version = <0x100>;
expanded_version = <0x00>;
reserved = <0x00>;
freq_0 = <0x420>;
freq_1 = <0x144>;
freq_2 = <0x210>;
freq_3 = <0x30c>;
freq_4 = <0x00>;
freq_5 = <0x00>;
pd_idle = <0x0d>;
sr_idle = <0x5d>;
sr_mc_gate_idle = <0x00>;
srpd_lite_idle = <0x00>;
standby_idle = <0x00>;
pd_dis_freq = <0x42a>;
sr_dis_freq = <0x320>;
dram_dll_dis_freq = <0x00>;
phy_dll_dis_freq = <0x00>;
phy_dq_drv_odten = <0x1e>;
phy_ca_drv_odten = <0x26>;
phy_clk_drv_odten = <0x26>;
dram_dq_drv_odten = <0x28>;
phy_dq_drv_odtoff = <0x1e>;
phy_ca_drv_odtoff = <0x26>;
phy_clk_drv_odtoff = <0x26>;
dram_dq_drv_odtoff = <0x28>;
dram_odt = <0x50>;
phy_odt = <0x3c>;
phy_odt_puup_en = <0x00>;
phy_odt_pudn_en = <0x00>;
dram_dq_odt_en_freq = <0x320>;
phy_odt_en_freq = <0x320>;
phy_dq_sr_odten = <0x00>;
phy_ca_sr_odten = <0x0f>;
phy_clk_sr_odten = <0x0f>;
phy_dq_sr_odtoff = <0x00>;
phy_ca_sr_odtoff = <0x0f>;
phy_clk_sr_odtoff = <0x0f>;
ssmod_downspread = <0x00>;
ssmod_div = <0x00>;
ssmod_spread = <0x00>;
mode_2t = <0x00>;
speed_bin = <0x00>;
dram_ext_temp = <0x00>;
byte_map = <0xe4>;
dq_map_cs0_dq_l = <0x00>;
dq_map_cs0_dq_h = <0x00>;
dq_map_cs1_dq_l = <0x00>;
dq_map_cs1_dq_h = <0x00>;
lp4_ca_odt = <0x78>;
lp4_drv_pu_cal_odten = <0x01>;
lp4_drv_pu_cal_odtoff = <0x01>;
phy_lp4_drv_pulldown_en_odten = <0x00>;
phy_lp4_drv_pulldown_en_odtoff = <0x00>;
lp4_ca_odt_en_freq = <0x320>;
phy_lp4_cs_drv_odten = <0x00>;
phy_lp4_cs_drv_odtoff = <0x00>;
lp4_odte_ck_en = <0x01>;
lp4_odte_cs_en = <0x01>;
lp4_odtd_ca_en = <0x00>;
phy_lp4_dq_vref_odten = <0xa6>;
lp4_dq_vref_odten = <0x12c>;
lp4_ca_vref_odten = <0x17c>;
phy_lp4_dq_vref_odtoff = <0x1a4>;
lp4_dq_vref_odtoff = <0x1a4>;
lp4_ca_vref_odtoff = <0x1a4>;
};
lpddr4x_params: lpddr4x-params {
version = <0x100>;
expanded_version = <0x00>;
reserved = <0x00>;
freq_0 = <0x420>;
freq_1 = <0x144>;
freq_2 = <0x210>;
freq_3 = <0x30c>;
freq_4 = <0x00>;
freq_5 = <0x00>;
pd_idle = <0x0d>;
sr_idle = <0x5d>;
sr_mc_gate_idle = <0x00>;
srpd_lite_idle = <0x00>;
standby_idle = <0x00>;
pd_dis_freq = <0x42a>;
sr_dis_freq = <0x320>;
dram_dll_dis_freq = <0x00>;
phy_dll_dis_freq = <0x00>;
phy_dq_drv_odten = <0x1d>;
phy_ca_drv_odten = <0x24>;
phy_clk_drv_odten = <0x24>;
dram_dq_drv_odten = <0x28>;
phy_dq_drv_odtoff = <0x1d>;
phy_ca_drv_odtoff = <0x24>;
phy_clk_drv_odtoff = <0x24>;
dram_dq_drv_odtoff = <0x28>;
dram_odt = <0x50>;
phy_odt = <0x3c>;
phy_odt_puup_en = <0x00>;
phy_odt_pudn_en = <0x00>;
dram_dq_odt_en_freq = <0x320>;
phy_odt_en_freq = <0x320>;
phy_dq_sr_odten = <0x00>;
phy_ca_sr_odten = <0x00>;
phy_clk_sr_odten = <0x00>;
phy_dq_sr_odtoff = <0x00>;
phy_ca_sr_odtoff = <0x00>;
phy_clk_sr_odtoff = <0x00>;
ssmod_downspread = <0x00>;
ssmod_div = <0x00>;
ssmod_spread = <0x00>;
mode_2t = <0x00>;
speed_bin = <0x00>;
dram_ext_temp = <0x00>;
byte_map = <0xe4>;
dq_map_cs0_dq_l = <0x00>;
dq_map_cs0_dq_h = <0x00>;
dq_map_cs1_dq_l = <0x00>;
dq_map_cs1_dq_h = <0x00>;
lp4_ca_odt = <0x78>;
lp4_drv_pu_cal_odten = <0x00>;
lp4_drv_pu_cal_odtoff = <0x00>;
phy_lp4_drv_pulldown_en_odten = <0x00>;
phy_lp4_drv_pulldown_en_odtoff = <0x00>;
lp4_ca_odt_en_freq = <0x320>;
phy_lp4_cs_drv_odten = <0x00>;
phy_lp4_cs_drv_odtoff = <0x00>;
lp4_odte_ck_en = <0x00>;
lp4_odte_cs_en = <0x00>;
lp4_odtd_ca_en = <0x00>;
phy_lp4_dq_vref_odten = <0xa6>;
lp4_dq_vref_odten = <0xe4>;
lp4_ca_vref_odten = <0x157>;
phy_lp4_dq_vref_odtoff = <0x1a4>;
lp4_dq_vref_odtoff = <0x1a4>;
lp4_ca_vref_odtoff = <0x157>;
};
dmc: dmc {
compatible = "rockchip,rk3568-dmc";
interrupts = <GIC_SPI 0x0a IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "complete";
devfreq-events = <&dfi 0xa2>;
clocks = <&scmi_clk 0x03>;
clock-names = "dmc_clk";
operating-points-v2 = <&dmc_opp_table>;
vop-bw-dmc-freq = <0x00 0x11e 0x4f1a0 0x11f 0x1869f 0x80e80>;
vop-frame-bw-dmc-freq = <0x00 0x26c 0x4f1a0 0x26d 0x1869f 0xbe6e0>;
cpu-bw-dmc-freq = <0x00 0x15e 0x4f1a0 0x15f 0x190 0x80e80 0x191 0x1869f 0xbe6e0>;
upthreshold = <0x28>;
downdifferential = <0x14>;
system-status-level = <0x01 0x04 0x08 0x08 0x02 0x01 0x10 0x04 0x10000 0x04 0x1000 0x08 0x4000 0x08 0x2000 0x08 0xc00 0x08>;
auto-min-freq = <0x4f1a0>;
auto-freq-en = <1>;
#cooling-cells = <2>;
status = "disabled";
center-supply = <&vdd_logic>;
};
dmc_fsp: dmc-fsp {
compatible = "rockchip,rk3568-dmc-fsp";
debug_print_level = <0>;
ddr3_params = <&ddr3_params>;
ddr4_params = <&ddr4_params>;
lpddr3_params = <&lpddr3_params>;
lpddr4_params = <&lpddr4_params>;
lpddr4x_params = <&lpddr4x_params>;
status = "disabled";
};
dmc_opp_table: dmc-opp-table {
compatible = "operating-points-v2";
mbist-vmin = <0xc96a8 0xdbba0 0xe7ef0>;
nvmem-cells = <0x70 0x07 0x08 0xa9 0x0a 0x0b>;
nvmem-cell-names = "leakage", "pvtm", "mbist-vmin", "opp-info", "specification_serial_number", "remark_spec_serial_number";
rockchip,supported-hw;
rockchip,max-volt = <0xf4240>;
rockchip,temp-hysteresis = <0x1388>;
rockchip,low-temp = <0x00>;
rockchip,low-temp-adjust-volt = <0x00 0x618 0x124f8>;
rockchip,leakage-voltage-sel = <0x01 0x50 0x00 0x51 0xfe 0x01>;
rockchip,pvtm-voltage-sel = <0x00 0x14820 0x00 0x14821 0x186a0 0x01>;
rockchip,pvtm-ch = <0x00 0x05>;
opp-1560000000 {
opp-supported-hw = <0xf9 0xffff>;
opp-hz = <0x00 0x5cfbb600>;
opp-microvolt = <0xdbba0 0xdbba0 0xf4240>;
opp-microvolt-L0 = <0xdbba0 0xdbba0 0xf4240>;
opp-microvolt-L1 = <0xd59f8 0xd59f8 0xf4240>;
};
};
};
&combphy1 {
status = "okay";
};
&combphy2 {
status = "okay";
};
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
&cpu1 {
cpu-supply = <&vdd_cpu>;
};
&cpu2 {
cpu-supply = <&vdd_cpu>;
};
&cpu3 {
cpu-supply = <&vdd_cpu>;
};
&gmac1 {
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
assigned-clock-rates = <0>, <125000000>;
clock_in_out = "input";
phy-handle = <&rgmii_phy0>;
phy-mode = "rgmii-id";
pinctrl-names = "default";
pinctrl-0 = <&gmac1m0_miim
&gmac1m0_tx_bus2
&gmac1m0_rx_bus2
&gmac1m0_rgmii_clk
&gmac1m0_clkinout
&gmac1m0_rgmii_bus>;
tx_delay = <0x30>;
rx_delay = <0x10>;
status = "okay";
};
&mdio1 {
rgmii_phy0: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reset-delay-us = <20000>;
reset-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
reset-post-delay-us = <100000>;
reg = <0x0>;
};
};
&gpu {
mali-supply = <&vdd_gpu>;
status = "disabled";
upthreshold = <0x28>;
downdifferential = <0x0a>;
gpu_power_model: power-model {
compatible = "simple-power-model";
leakage-range = <0x05 0x0f>;
ls = <0xffffa23e 0x5927 0x00>;
static-coefficient = <0x186a0>;
dynamic-coefficient = <0x3b9>;
ts = <0xfffe56a6 0xf87a 0xfffffab5 0x14>;
thermal-zone = "gpu-thermal";
};
};
&display_subsystem {
devfreq = <&dmc>;
status = "disabled";
route {
route_dsi0: route-dsi0 {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <0x11>;
};
route_dsi1: route-dsi1 {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <0x12>;
};
route_edp: route-edp {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <0x13>;
};
route_hdmi: route-hdmi {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <0x14>;
};
route_lvds: route-lvds {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <0x15>;
};
route_rgb: route-rgb {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <0x16>;
};
};
};
&vp0 {
#address-cells = <1>;
#size-cells = <0>;
vp0_out_dsi0: endpoint@0 {
reg = <0>;
remote-endpoint = <&dsi0_in_vp0>;
};
vp0_out_dsi1: endpoint@1 {
reg = <1>;
remote-endpoint = <&dsi1_in_vp0>;
};
vp0_out_edp: endpoint@2 {
reg = <2>;
remote-endpoint = <&edp_in_vp0>;
};
/*vp0_out_hdmi: endpoint@3 {
reg = <3>;
remote-endpoint = <&hdmi_in_vp0>;
};*/
};
&vp1 {
#address-cells = <1>;
#size-cells = <0>;
vp1_out_dsi0: endpoint@0 {
reg = <0>;
remote-endpoint = <&dsi0_in_vp1>;
};
vp1_out_dsi1: endpoint@1 {
reg = <1>;
remote-endpoint = <&dsi1_in_vp1>;
};
vp1_out_edp: endpoint@2 {
reg = <2>;
remote-endpoint = <&edp_in_vp1>;
};
/*vp1_out_hdmi: endpoint@3 {
reg = <3>;
remote-endpoint = <&hdmi_in_vp1>;
};*/
vp1_out_lvds: endpoint@4 {
reg = <4>;
remote-endpoint = <&lvds_in_vp1>;
};
};
&vp2 {
#address-cells = <1>;
#size-cells = <0>;
vp2_out_lvds: endpoint@0 {
reg = <0>;
remote-endpoint = <&lvds_in_vp2>;
};
vp2_out_rgb: endpoint@1 {
reg = <1>;
remote-endpoint = <&rgb_in_vp2>;
};
};
&dsi0_in {
dsi0_in_vp0: endpoint@0 {
reg = <0>;
remote-endpoint = <&vp0_out_dsi0>;
status = "disabled";
};
dsi0_in_vp1: endpoint@1 {
reg = <1>;
remote-endpoint = <&vp1_out_dsi0>;
status = "disabled";
};
};
&dsi1_in {
reg = <0>;
dsi1_in_vp0: endpoint@0 {
reg = <0>;
remote-endpoint = <&vp0_out_dsi1>;
status = "disabled";
};
dsi1_in_vp1: endpoint@1 {
reg = <1>;
remote-endpoint = <&vp1_out_dsi1>;
status = "disabled";
};
};
&dsi1_out {
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
&dsi1 {
dsi1_panel: panel@0 {
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
power-supply = <&vcc3v3_sys>;
compatible = "btt-pitft";
reg = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
};
&edp_in{
#address-cells = <1>;
#size-cells = <0>;
edp_in_vp0: endpoint@0 {
reg = <0>;
remote-endpoint = <&vp0_out_edp>;
status = "disabled";
};
edp_in_vp1: endpoint@1 {
reg = <1>;
remote-endpoint = <&vp1_out_edp>;
status = "disabled";
};
};
&grf {
io_domains: io-domains {
compatible = "rockchip,rk3568-io-voltage-domain";
status = "disabled";
};
lvds: lvds {
compatible = "rockchip,rk3568-lvds";
phys = <&dsi_dphy0>;
phy-names = "phy";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
lvds_in_vp1: endpoint@1 {
reg = <1>;
remote-endpoint = <&vp1_out_lvds>;
status = "disabled";
};
lvds_in_vp2: endpoint@2 {
reg = <2>;
remote-endpoint = <&vp2_out_lvds>;
status = "disabled";
};
};
};
};
rgb: rgb {
compatible = "rockchip,rk3568-rgb";
pinctrl-names = "default";
pinctrl-0 = <&lcdc_ctl>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
rgb_in_vp2: endpoint@2 {
reg = <2>;
remote-endpoint = <&vp2_out_rgb>;
status = "disabled";
};
};
};
};
};
&i2c0 {
status = "okay";
vdd_cpu: regulator@1c {
compatible = "tcs,tcs4525";
reg = <0x1c>;
regulator-name = "vdd_cpu";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1390000>;
regulator-initial-mode = <1>;
regulator-ramp-delay = <2300>;
regulator-boot-on;
regulator-always-on;
vin-supply = <&vcc5v0_sys>;
fcs,suspend-voltage-selector = <1>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
rk809: pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
#clock-cells = <1>;
clock-names = "mclk";
clocks = <&cru I2S1_MCLKOUT_TX>;
clock-output-names = "rk808-clkout1", "rk808-clkout2";
pinctrl-names = "default", "pmic-sleep",
"pmic-power-off", "pmic-reset";
pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
#sound-dai-cells = <0>;
system-power-controller;
wakeup-source;
vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
vcc4-supply = <&vcc3v3_sys>;
vcc5-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc3v3_sys>;
regulators {
vdd_logic: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_logic";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu: DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_gpu";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-name = "vcc_ddr";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vdd_npu: DCDC_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_npu";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_image: LDO_REG1 {
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdda0v9_image";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda_0v9: LDO_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdda_0v9";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_pmu: LDO_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdda0v9_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vccio_acodec: LDO_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vccio_acodec";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd: LDO_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_pmu: LDO_REG6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc3v3_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcca_1v8: LDO_REG7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca_1v8";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca1v8_pmu: LDO_REG8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca1v8_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcca1v8_image: LDO_REG9 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca1v8_image";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8: DCDC_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v3: SWITCH_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_3v3";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_sd: SWITCH_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc3v3_sd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
codec {
rockchip,mic-in-differential;
};
};
};
&i2c2 {
pinctrl-0 = <&i2c2m1_xfer>;
};
&i2c3 {
status = "okay";
tft_tp: touchscreen@48 {
compatible = "ti,tsc2007";
reg = <0x48>;
status = "disabled";
ti,x-plate-ohms = <660>;
ti,rt-thr = <3000>;
ti,fuzzx = <32>;
ti,fuzzy = <16>;
};
};
&i2s0_8ch {
status = "disabled";
};
&i2s1_8ch {
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
rockchip,trcm-sync-tx-only;
status = "disabled";
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
can_mcp2515: can@0 {
compatible = "microchip,mcp2515";
reg = <0x00>;
clocks = <&can_mcp2515_osc>;
interrupt-parent = <&gpio4>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&mcp2515_int_pin>;
spi-max-frequency = <10000000>;
vdd-supply = <&vcc3v3_sys>;
xceiver-supply = <&vcc3v3_sys>;
};
};
&spi3 {
pinctrl-names = "default";
pinctrl-0 = <&spi3m1_cs0 &spi3m1_pins>;
};
&pcie2x1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_reset_h>;
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "disabled";
};
&pinctrl {
bt {
bt_enable: bt-enable-h {
rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
};
bt_host_wake: bt-host-wake-l {
rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
};
bt_wake: bt-wake-l {
rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
pcie_drv: pcie-drv {
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_reset_h: pcie-reset-h {
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
wifi_host_wake: wifi-host-wake-l {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_otg_en: vcc5v0-otg-en {
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_usb2t_en: vcc5v0-usb2t-en {
rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_usb2b_en: vcc5v0-usb2b-en {
rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
work-led {
heartbeat_led: led-heartbeat {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
blue_led: led-blue {
rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
mcp2515 {
mcp2515_int_pin: mcp2515-int-pin {
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&pmu_io_domains {
pmuio1-supply = <&vcc3v3_pmu>;
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vcc_3v3>;
vccio2-supply = <&vcc_1v8>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_3v3>;
vccio7-supply = <&vcc_3v3>;
status = "okay";
};
&pwm0 {
pinctrl-names = "default";
pinctrl-0 = <&pwm0m1_pins>;
};
&pwm12 {
pinctrl-names = "default";
pinctrl-0 = <&pwm12m1_pins>;
};
&pwm13 {
pinctrl-names = "default";
pinctrl-0 = <&pwm13m1_pins>;
};
&pwm14 {
pinctrl-names = "default";
pinctrl-0 = <&pwm14m1_pins>;
};
&pwm15 {
pinctrl-names = "default";
pinctrl-0 = <&pwm15m1_pins>;
};
&saradc {
vref-supply = <&vcca_1v8>;
status = "disabled";
};
&sdhci {
bus-width = <8>;
max-frequency = <200000000>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
status = "okay";
};
&sdmmc0 {
max-frequency = <150000000>;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
vmmc-supply = <&vcc_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
};
&sdmmc1 {
/* WiFi & BT combo module AMPAK AP6256 */
#address-cells = <1>;
#size-cells = <0>;
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
disable-wp;
keep-power-in-suspend;
max-frequency = <150000000>;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
rockchip,default-sample-phase = <90>;
status = "okay";
sdio-wifi@1 {
compatible = "brcm,bcm4329-fmac";
reg = <1>;
interrupt-parent = <&gpio2>;
interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host-wake";
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake>;
brcm,drive-strength = <10>;
};
};
&sfc {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
};
&tsadc {
status = "disabled";
};
&uart1 {
dma-names = "tx","rx";
pinctrl-names = "default";
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "brcm,bcm4345c5";
clocks = <&rk809 1>;
clock-names = "lpo";
device-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
host-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bt_host_wake &bt_wake &bt_enable>;
vbat-supply = <&vcc3v3_sys>;
vddio-supply = <&vcca1v8_pmu>;
};
};
&uart2 {
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&uart5m1_xfer>;
};
&uart7 {
pinctrl-names = "default";
pinctrl-0 = <&uart7m2_xfer>;
};
&usb2phy0 {
status = "okay";
};
&usb2phy0_host {
phy-supply = <&vcc5v0_host>;
status = "okay";
};
&usb2phy0_otg {
phy-supply = <&vcc5v0_otg>;
status = "okay";
};
&usb2phy1 {
status = "okay";
};
&usb2phy1_host {
phy-supply = <&vcc5v0_usb2t>;
status = "okay";
};
&usb2phy1_otg {
phy-supply = <&vcc5v0_usb2b>;
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host0_xhci {
dr_mode = "host";
extcon = <&usb2phy0>;
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&usb_host1_xhci {
status = "okay";
};
&vop {
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
status = "disabled";
};
&vop_mmu {
status = "disabled";
};
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