SBC_builder/patch/kernel/sunxi-6.14/patches.megous/clk-sunxi-ng-sun50i-a64-Switch-parent-of-MIPI-DSI-to-periph0-1x.patch
2025-06-01 01:05:27 +02:00

49 lines
1.7 KiB
Diff

From ca29006df14a1f3d0f292e207753bd5925604259 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ond=C5=99ej=20Jirman?= <megi@xff.cz>
Date: Mon, 14 Aug 2023 07:28:11 +0200
Subject: clk: sunxi-ng: sun50i-a64: Switch parent of MIPI-DSI to periph0(1x)
This makes video0(1x) clock less constrained, and improves compatibility
with external monitors on Pinephone when using both internal display
and HDMI output at once.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
---
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index 4b3068bdfdf2..e76a1c10f390 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -962,6 +962,8 @@ static struct ccu_mux_nb sun50i_a64_cpu_nb = {
.bypass_index = 1, /* index of 24 MHz oscillator */
};
+#define CCU_MIPI_DSI_CLK 0x168
+
static int sun50i_a64_ccu_probe(struct platform_device *pdev)
{
void __iomem *reg;
@@ -980,7 +982,16 @@ static int sun50i_a64_ccu_probe(struct platform_device *pdev)
/* Decrease the PLL AUDIO bias current to reduce noise. */
writel(0x10040000, reg + SUN50I_A64_PLL_AUDIO_BIAS_REG);
- writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG);
+ ret = of_property_read_u32_index(of_chosen, "p-boot,framebuffer-start", 0, &val);
+ if (ret) {
+ writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG);
+
+ /* Set MIPI-DSI clock parent to periph0(1x), so that video0(1x) is free to change. */
+ val = readl(reg + CCU_MIPI_DSI_CLK);
+ val &= 0x30f;
+ val |= (2 << 8) | ((4 - 1) << 0); /* M-1 */
+ writel(val, reg + CCU_MIPI_DSI_CLK);
+ }
ret = devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_a64_ccu_desc);
if (ret)
--
2.35.3