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101 lines
3.7 KiB
Diff
101 lines
3.7 KiB
Diff
From 0c10a80b8e37d9a7fc57d8bf968c70419423065a Mon Sep 17 00:00:00 2001
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From: Jernej Skrabec <jernej.skrabec@gmail.com>
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Date: Sun, 29 Sep 2024 22:04:47 +1300
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Subject: drm: sun4i: vi_scaler refactor vi_scaler enablement
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If the video scaler is required, then it is obligatory to set the
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relevant register to enable it, so move this to the
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sun8i_vi_scaler_setup() function.
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This simplifies the alternate case (scaler not required) so replace the
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vi_scaler_enable() function with a vi_scaler_disable() function.
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Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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Signed-off-by: Ryan Walklin <ryan@testtoast.com>
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---
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drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 3 +--
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drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 21 +++++++++++----------
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drivers/gpu/drm/sun4i/sun8i_vi_scaler.h | 2 +-
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3 files changed, 13 insertions(+), 13 deletions(-)
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diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
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index 4647e9bcccaa..e348fd0a3d81 100644
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--- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
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+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
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@@ -156,10 +156,9 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel,
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sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, dst_w,
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dst_h, hscale, vscale, hphase, vphase,
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format);
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- sun8i_vi_scaler_enable(mixer, channel, true);
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} else {
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DRM_DEBUG_DRIVER("HW scaling is not needed\n");
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- sun8i_vi_scaler_enable(mixer, channel, false);
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+ sun8i_vi_scaler_disable(mixer, channel);
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}
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regmap_write(mixer->engine.regs,
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diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c
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index aa346c3beb30..e7242301b312 100644
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--- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c
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+++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c
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@@ -933,20 +933,13 @@ static void sun8i_vi_scaler_set_coeff_ui(struct regmap *map, u32 base,
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&table[offset], SUN8I_VI_SCALER_COEFF_COUNT);
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}
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-void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable)
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+void sun8i_vi_scaler_disable(struct sun8i_mixer *mixer, int layer)
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{
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- u32 val, base;
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+ u32 base;
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base = sun8i_vi_scaler_base(mixer, layer);
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- if (enable)
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- val = SUN8I_SCALER_VSU_CTRL_EN |
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- SUN8I_SCALER_VSU_CTRL_COEFF_RDY;
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- else
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- val = 0;
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-
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- regmap_write(mixer->engine.regs,
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- SUN8I_SCALER_VSU_CTRL(base), val);
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+ regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CTRL(base), 0);
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}
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void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer,
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@@ -982,6 +975,9 @@ void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer,
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cvphase = vphase;
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}
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+ regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CTRL(base),
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+ SUN8I_SCALER_VSU_CTRL_EN);
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+
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if (mixer->cfg->de_type >= sun8i_mixer_de3) {
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u32 val;
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@@ -1027,4 +1023,9 @@ void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer,
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else
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sun8i_vi_scaler_set_coeff_ui(mixer->engine.regs, base,
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hscale, vscale, format);
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+
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+ if (mixer->cfg->de_type <= sun8i_mixer_de3)
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+ regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CTRL(base),
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+ SUN8I_SCALER_VSU_CTRL_EN |
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+ SUN8I_SCALER_VSU_CTRL_COEFF_RDY);
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}
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diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h
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index 68f6593b369a..e801bc7a4189 100644
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--- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h
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+++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h
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@@ -69,7 +69,7 @@
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#define SUN50I_SCALER_VSU_ANGLE_SHIFT(x) (((x) << 16) & 0xF)
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#define SUN50I_SCALER_VSU_ANGLE_OFFSET(x) ((x) & 0xFF)
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-void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable);
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+void sun8i_vi_scaler_disable(struct sun8i_mixer *mixer, int layer);
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void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer,
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u32 src_w, u32 src_h, u32 dst_w, u32 dst_h,
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u32 hscale, u32 vscale, u32 hphase, u32 vphase,
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--
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2.35.3
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