From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Maxim Medvedev <redrathnure@gmail.com>
Date: Fri, 12 May 2023 22:30:14 +0000
Subject: Custom st7796 display module

---
 drivers/staging/fbtft/Kconfig     |   6 +
 drivers/staging/fbtft/Makefile    |   1 +
 drivers/staging/fbtft/fb_st7796.c | 154 ++++++++++
 3 files changed, 161 insertions(+)

diff --git a/drivers/staging/fbtft/Kconfig b/drivers/staging/fbtft/Kconfig
index 111111111111..222222222222 100644
--- a/drivers/staging/fbtft/Kconfig
+++ b/drivers/staging/fbtft/Kconfig
@@ -70,6 +70,12 @@ config FB_TFT_ILI9481
 	help
 	  Generic Framebuffer support for ILI9481
 
+config FB_TFT_ST7796
+	tristate "FB driver for the ST7796 LCD Controller"
+	depends on FB_TFT
+	help
+	  Generic Framebuffer support for ST7796
+
 config FB_TFT_ILI9486
 	tristate "FB driver for the ILI9486 LCD Controller"
 	help
diff --git a/drivers/staging/fbtft/Makefile b/drivers/staging/fbtft/Makefile
index 111111111111..222222222222 100644
--- a/drivers/staging/fbtft/Makefile
+++ b/drivers/staging/fbtft/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_FB_TFT_ILI9325)     += fb_ili9325.o
 obj-$(CONFIG_FB_TFT_ILI9340)     += fb_ili9340.o
 obj-$(CONFIG_FB_TFT_ILI9341)     += fb_ili9341.o
 obj-$(CONFIG_FB_TFT_ILI9481)     += fb_ili9481.o
+obj-$(CONFIG_FB_TFT_ST7796)      += fb_st7796.o
 obj-$(CONFIG_FB_TFT_ILI9486)     += fb_ili9486.o
 obj-$(CONFIG_FB_TFT_PCD8544)     += fb_pcd8544.o
 obj-$(CONFIG_FB_TFT_RA8875)      += fb_ra8875.o
diff --git a/drivers/staging/fbtft/fb_st7796.c b/drivers/staging/fbtft/fb_st7796.c
new file mode 100755
index 000000000000..111111111111
--- /dev/null
+++ b/drivers/staging/fbtft/fb_st7796.c
@@ -0,0 +1,154 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * FB driver for the ST7796 LCD display controller
+ *
+ * Based on ILI9486 from Christian Vogelgsang and adafruit22fb.c by Noralf Tronnes.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <video/mipi_display.h>
+
+#include "fbtft.h"
+
+// Patch from MKS - start
+
+#define DRVNAME		"fb_st7796"
+#define WIDTH		320
+#define HEIGHT		480	
+#define TXBUFLEN	0xfffe // (4 * PAGE_SIZE)
+
+ // Patch from MKS - end
+
+#define DEFAULT_GAMMA	"1F 1A 18 0A 0F 06 45 87 32 0A 07 02 07 05 00\n" \
+			"00 25 27 05 10 09 3A 78 4D 05 18 0D 38 3A 1F"
+
+static int init_display(struct fbtft_par *par)
+{
+	par->fbtftops.reset(par);
+
+	/* startup sequence for MI0283QT-9A */
+	write_reg(par, MIPI_DCS_SOFT_RESET);
+	mdelay(5);
+	write_reg(par, MIPI_DCS_SET_DISPLAY_OFF);
+	
+	// Patch from MKS - start	
+	
+	/*these are for st7796*/
+	/* --------------------------------------------------------- */
+	write_reg(par, 0xf0, 0xc3);
+	write_reg(par, 0xf0, 0x96);
+	write_reg(par, 0x36, 0x28);
+	write_reg(par, 0x3A, 0x55);
+	write_reg(par, 0xB4, 0x01);
+	write_reg(par, 0xB7, 0xc6);
+	write_reg(par, 0xE8, 0x40, 0x8a, 0x00, 0x00, 0x29, 0x19, 0xa5, 0x33);
+	write_reg(par, 0xc1, 0x06);
+	write_reg(par, 0xc2, 0xa7);
+	write_reg(par, 0xc5, 0x18);
+	write_reg(par, 0xE0, 0xf0, 0x09, 0x0b, 0x06, 0x04, 0x15, 0x2f, 0x54, 0x42, 0x3c, 0x17, 0x14, 0x18, 0x1b);
+	write_reg(par, 0xE1, 0xf0, 0x09, 0x0b, 0x06, 0x04, 0x03, 0x2d, 0x43, 0x42, 0x3b, 0x16, 0x14, 0x17, 0x1b);
+	write_reg(par, 0xf0, 0x3c);
+	write_reg(par, 0xf0, 0x69);
+	write_reg(par, 0x11);
+	mdelay(100);
+	write_reg(par, 0x29);
+	mdelay(20);
+
+	// Patch from MKS - end
+
+	return 0;
+}
+
+static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
+{
+	write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
+		  (xs >> 8) & 0xFF, xs & 0xFF, (xe >> 8) & 0xFF, xe & 0xFF);
+
+	write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
+		  (ys >> 8) & 0xFF, ys & 0xFF, (ye >> 8) & 0xFF, ye & 0xFF);
+
+	write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
+}
+
+#define MEM_Y   BIT(7) /* MY row address order */
+#define MEM_X   BIT(6) /* MX column address order */
+#define MEM_V   BIT(5) /* MV row / column exchange */
+#define MEM_L   BIT(4) /* ML vertical refresh order */
+#define MEM_H   BIT(2) /* MH horizontal refresh order */
+#define MEM_BGR (3) /* RGB-BGR Order */
+static int set_var(struct fbtft_par *par)
+{
+	switch (par->info->var.rotate) {
+	case 0:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  MEM_X | (par->bgr << MEM_BGR));
+		break;
+	case 270:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  MEM_V | MEM_L | (par->bgr << MEM_BGR));
+		break;
+	case 180:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  MEM_Y | (par->bgr << MEM_BGR));
+		break;
+	case 90:
+		write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
+			  MEM_Y | MEM_X | MEM_V | (par->bgr << MEM_BGR));
+		break;
+	}
+
+	return 0;
+}
+
+/*
+ * Gamma string format:
+ *  Positive: Par1 Par2 [...] Par15
+ *  Negative: Par1 Par2 [...] Par15
+ */
+#define CURVE(num, idx)  curves[(num) * par->gamma.num_values + (idx)]
+static int set_gamma(struct fbtft_par *par, u32 *curves)
+{
+	int i;
+
+	for (i = 0; i < par->gamma.num_curves; i++)
+		write_reg(par, 0xE0 + i,
+			  CURVE(i, 0), CURVE(i, 1), CURVE(i, 2),
+			  CURVE(i, 3), CURVE(i, 4), CURVE(i, 5),
+			  CURVE(i, 6), CURVE(i, 7), CURVE(i, 8),
+			  CURVE(i, 9), CURVE(i, 10), CURVE(i, 11),
+			  CURVE(i, 12), CURVE(i, 13), CURVE(i, 14));
+
+	return 0;
+}
+
+#undef CURVE
+
+static struct fbtft_display display = {
+	.regwidth = 8,
+	.width = WIDTH,
+	.height = HEIGHT,
+	.txbuflen = TXBUFLEN,
+	.gamma_num = 2,
+	.gamma_len = 15,
+	.gamma = DEFAULT_GAMMA,
+	.fbtftops = {
+		.init_display = init_display,
+		.set_addr_win = set_addr_win,
+		.set_var = set_var,
+		.set_gamma = set_gamma,
+	},
+};
+
+FBTFT_REGISTER_DRIVER(DRVNAME, "ilitek,st7796", &display);
+
+MODULE_ALIAS("spi:" DRVNAME);
+MODULE_ALIAS("platform:" DRVNAME);
+MODULE_ALIAS("spi:st7796");
+MODULE_ALIAS("platform:st7796");
+
+MODULE_DESCRIPTION("FB driver for the ST7796 LCD display controller");
+MODULE_AUTHOR("Christian Vogelgsang + somebody from makerbase");
+MODULE_LICENSE("GPL");
-- 
Armbian