From 2c8fcfebe335951a63e1ecb3c8906c919f4ab94c Mon Sep 17 00:00:00 2001 From: Gunjan Gupta Date: Fri, 29 Dec 2023 11:18:33 +0000 Subject: arm64: dts: h616: add hdmi support for zero2 and zero3 --- .../allwinner/sun50i-h616-orangepi-zero.dtsi | 25 ++ .../allwinner/sun50i-h616-orangepi-zero2.dts | 4 + .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 213 ++++++++++++++++++ 3 files changed, 242 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi index 061848cf8b13..60f643abb3eb 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi @@ -23,6 +23,17 @@ chosen { stdout-path = "serial0:115200n8"; }; + connector { + compatible = "hdmi-connector"; + type = "d"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + leds { compatible = "gpio-leds"; @@ -95,6 +106,10 @@ &codec { status = "okay"; }; +&de { + status = "okay"; +}; + &ehci1 { status = "okay"; }; @@ -115,6 +130,16 @@ &emac0 { status = "okay"; }; +&hdmi { + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + &mdio0 { ext_rgmii_phy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts index 42c099483fdd..60dd0860f49f 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts @@ -29,6 +29,10 @@ &gpu { status = "okay"; }; +&hdmi { + hvcc-supply = <®_bldo1>; +}; + &mmc0 { vmmc-supply = <®_dcdce>; }; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi index 5c1e2dc77268..564c5853af97 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -7,8 +7,11 @@ #include #include #include +#include +#include #include #include +#include #include / { @@ -94,6 +97,12 @@ l2_cache: l2-cache { }; }; + de: display-engine { + compatible = "allwinner,sun50i-h6-display-engine"; + allwinner,pipelines = <&mixer0>; + status = "disabled"; + }; + reserved-memory { #address-cells = <2>; #size-cells = <2>; @@ -150,6 +159,50 @@ soc { #size-cells = <1>; ranges = <0x0 0x0 0x0 0x40000000>; + bus@1000000 { + compatible = "allwinner,sun50i-h616-de33", + "allwinner,sun50i-a64-de2"; + reg = <0x1000000 0x400000>; + allwinner,sram = <&de3_sram 1>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1000000 0x400000>; + + display_clocks: clock@8000 { + compatible = "allwinner,sun50i-h616-de33-clk"; + reg = <0x8000 0x100>; + clocks = <&ccu CLK_DE>, <&ccu CLK_BUS_DE>; + clock-names = "mod", "bus"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + mixer0: mixer@100000 { + compatible = "allwinner,sun50i-h616-de33-mixer-0"; + reg = <0x100000 0x100000>, + <0x8100 0x40>, + <0x280000 0x20000>; + clocks = <&display_clocks CLK_BUS_MIXER0>, + <&display_clocks CLK_MIXER0>; + clock-names = "bus", "mod"; + resets = <&display_clocks RST_MIXER0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mixer0_out: port@1 { + reg = <1>; + + mixer0_out_tcon_top_mixer0: endpoint { + remote-endpoint = <&tcon_top_mixer0_in_mixer0>; + }; + }; + }; + }; + }; + gpu: gpu@1800000 { compatible = "allwinner,sun50i-h616-mali", "arm,mali-bifrost"; @@ -193,12 +246,31 @@ syscon: syscon@3000000 { #size-cells = <1>; ranges; + sram_a2: sram@100000 { + compatible = "mmio-sram"; + reg = <0x00100000 0x18000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x00100000 0x18000>; + + scpi_sram: scpi-sram@17c00 { + compatible = "arm,scp-shmem"; + reg = <0x17c00 0x200>; + }; + }; + sram_c: sram@28000 { compatible = "mmio-sram"; reg = <0x00028000 0x30000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x00028000 0x30000>; + + de3_sram: sram-section@0 { + compatible = "allwinner,sun50i-h616-sram-c", + "allwinner,sun50i-a64-sram-c"; + reg = <0x0000 0x1e000>; + }; }; sram_c1: sram@1a00000 { @@ -918,6 +990,147 @@ ohci3: usb@5311400 { status = "disabled"; }; + hdmi: hdmi@6000000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun50i-h616-dw-hdmi", + "allwinner,sun50i-h6-dw-hdmi"; + reg = <0x06000000 0x10000>; + reg-io-width = <1>; + interrupts = ; + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>, + <&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>, + <&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>; + clock-names = "iahb", "isfr", "tmds", "cec", "hdcp", + "hdcp-bus"; + resets = <&ccu RST_BUS_HDMI>, <&ccu RST_BUS_HDCP>; + reset-names = "ctrl", "hdcp"; + phys = <&hdmi_phy>; + phy-names = "phy"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + hdmi_in: port@0 { + reg = <0>; + + hdmi_in_tcon_top: endpoint { + remote-endpoint = <&tcon_top_hdmi_out_hdmi>; + }; + }; + + hdmi_out: port@1 { + reg = <1>; + }; + }; + }; + + hdmi_phy: hdmi-phy@6010000 { + compatible = "allwinner,sun50i-h616-hdmi-phy"; + reg = <0x06010000 0x10000>; + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_HDMI_SUB>; + reset-names = "phy"; + #phy-cells = <0>; + }; + + tcon_top: tcon-top@6510000 { + compatible = "allwinner,sun50i-h6-tcon-top"; + reg = <0x06510000 0x1000>; + clocks = <&ccu CLK_BUS_TCON_TOP>, + <&ccu CLK_TCON_TV0>; + clock-names = "bus", + "tcon-tv0"; + clock-output-names = "tcon-top-tv0"; + resets = <&ccu RST_BUS_TCON_TOP>; + #clock-cells = <1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon_top_mixer0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tcon_top_mixer0_in_mixer0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mixer0_out_tcon_top_mixer0>; + }; + }; + + tcon_top_mixer0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + tcon_top_mixer0_out_tcon_tv: endpoint@2 { + reg = <2>; + remote-endpoint = <&tcon_tv_in_tcon_top_mixer0>; + }; + }; + + tcon_top_hdmi_in: port@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + + tcon_top_hdmi_in_tcon_tv: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon_tv_out_tcon_top>; + }; + }; + + tcon_top_hdmi_out: port@5 { + reg = <5>; + + tcon_top_hdmi_out_hdmi: endpoint { + remote-endpoint = <&hdmi_in_tcon_top>; + }; + }; + }; + }; + + tcon_tv: lcd-controller@6515000 { + compatible = "allwinner,sun50i-h6-tcon-tv", + "allwinner,sun8i-r40-tcon-tv"; + reg = <0x06515000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_TCON_TV0>, + <&tcon_top CLK_TCON_TOP_TV0>; + clock-names = "ahb", + "tcon-ch1"; + resets = <&ccu RST_BUS_TCON_TV0>; + reset-names = "lcd"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon_tv_in: port@0 { + reg = <0>; + + tcon_tv_in_tcon_top_mixer0: endpoint { + remote-endpoint = <&tcon_top_mixer0_out_tcon_tv>; + }; + }; + + tcon_tv_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + tcon_tv_out_tcon_top: endpoint@1 { + reg = <1>; + remote-endpoint = <&tcon_top_hdmi_in_tcon_tv>; + }; + }; + }; + }; + rtc: rtc@7000000 { compatible = "allwinner,sun50i-h616-rtc"; reg = <0x07000000 0x400>; -- 2.35.3