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Add overlays for Pi2

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This commit is contained in:
andreili 2025-08-24 14:03:36 +02:00
parent 93f4b637c9
commit 8d931311fe
11 changed files with 167 additions and 102 deletions
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23
config/board/btt_pi2.json
View File

@ -9,7 +9,9 @@
"TPL_BIN:rk3566_ddr_1056MHz_v1.23.bin",
"BL31_BIN:rk3568_bl31_v1.44.elf",
"ARCH:aarch64",
"DTB_FILE:rockchip/rk3566-bigtreetech-pi2.dtb"
"DTB_FILE:rockchip/rk3566-bigtreetech-pi2.dtb",
"DTO_FILES:rockchip/rk3566-*.dtbo",
"DTO_DIR:rockchip/overlays"
],
"targets":
[
@ -52,7 +54,7 @@
},
{
"file": "u-boot-rockchip-spi.bin",
"store_type": "temp"
"store_type": "boot"
}
],
"target": [ "" ],
@ -64,7 +66,7 @@
"version_type": "tag",
"patch_dir": [ "kernel", "kernel/rockchip64-6.16" ],
"config_def": "printer_defconfig",
"target": [ "clean", "Image", "modules", "dtbs", "modules_install" ],
"target": [ "Image", "modules", "dtbs", "modules_install" ],
"artifacts":
[
{
@ -74,7 +76,13 @@
{
"file": "arch/arm64/boot/dts/%{DTB_FILE}%",
"store_type": "boot",
"subdir": "dtb/rockchip"
"subdir": "dtb/rockchip",
"destdir": "dtb"
},
{
"file": "arch/arm64/boot/dts/%{DTO_FILES}%",
"store_type": "none",
"subdir": "dtb/rockchip/overlays"
}
],
"makeopts": "CROSS_COMPILE=%{CROSS_C}% ARCH=arm64 INSTALL_MOD_PATH=%{out_dir}%/kmods/usr"
@ -96,6 +104,13 @@
"name": "rw",
"size": "2G"
}
],
"overlays":
[
"/dtb/%{DTO_DIR}%/rk3566-sfc-nor.dtbo",
"/dtb/%{DTO_DIR}%/rk3566-w1-gpio4-pb2.dtbo",
"/dtb/%{DTO_DIR}%/rk3566-dsi1.dtbo",
"/dtb/%{DTO_DIR}%/rk3566-pcie.dtbo"
]
}
}

39
scripts/os.py
View File

@ -14,12 +14,13 @@ class OS:
self.root_dir = f"{ROOT_DIR}/root"
self.mount_dir = f"{ROOT_DIR}/build/mnt_tmp"
self.actions = [
[ "chroot", self.chroot ],
[ "sync", self.sync_repo ],
[ "update", self.update_all ],
[ "reinstall", self.rebuild_all ],
[ "pack", self.pack ],
[ "sqh", self.sqh ]
[ "chroot", self.chroot ],
[ "sync", self.sync_repo ],
[ "update", self.update_all ],
[ "reinstall", self.rebuild_all ],
[ "pack", self.pack ],
[ "sqh", self.sqh ],
[ "sqh_kmod", self.make_sqh_kmod ]
]
def __relaunch_as_sudo(self):
@ -245,6 +246,7 @@ class OS:
self.__stage3_steps(self.finalize, "Finalize system installation...", dir=dir)
def make_sqh_kmod(self):
self.__relaunch_as_sudo()
mod_path = f"{ROOT_DIR}/out/modules"
os.makedirs(mod_path, exist_ok=True)
kmod_fn = self.board.parse_variables("%{out_dir}%/kmods/usr/lib/modules")
@ -255,9 +257,8 @@ class OS:
break
def sqh(self):
self.__relaunch_as_sudo()
#self.__relaunch_as_sudo()
self.make_sqh_kmod()
exit(0)
date = datetime.datetime.today().strftime('%Y_%m_%d')
temp_dir = f"{ROOT_DIR}/build/tmp"
# pack full system via tar
@ -405,8 +406,12 @@ class OS:
def __copy_file(self, src, dst):
Logger.install(f"\tCopy {src}")
dir_ch = Path(src)
self.__sudo(["mkdir", "-p", dst], stdout=subprocess.DEVNULL)
self.__sudo(["cp", src, dst], stdout=subprocess.DEVNULL)
if (dir_ch.is_dir()):
self.__sudo(["cp", "-Hr", src, dst], stdout=subprocess.DEVNULL)
else:
self.__sudo(["cp", src, dst], stdout=subprocess.DEVNULL)
def __dd_bin(self, src, block_size, offset):
blk_sz = self.__parse_size(block_size)
@ -418,9 +423,21 @@ class OS:
extl_dir = f"{out_dir}/extlinux"
extl_fn = f"{extl_dir}/extlinux.conf"
dtb_file = self.board.parse_variables("%{DTB_FILE}%")
dto_dir = self.board.parse_variables("%{DTO_DIR}%")
cmd = f"mkdir -p {extl_dir} && touch {out_dir}/livecd && "
cmd += f"echo 'menu title Boot Options.\n\ntimeout 20\ndefault Kernel_def\n\n"
cmd += f"label Kernel_def\n\tkernel /Image\n\tfdtdir /dtb/\n\tdevicetree /dtb/{dtb_file}\n\tinitrd /uInitrd\n' >> {extl_fn}"
cmd += f"echo 'menu title Boot Options.\n\n"
cmd += f"timeout 20\ndefault Kernel_def\n\n"
cmd += f"label Kernel_def\n"
cmd += f"\tkernel /Image\n"
cmd += f"\tfdtdir /dtb/\n"
cmd += f"\tdevicetree /dtb/{dtb_file}\n"
cmd += f"\tinitrd /uInitrd\n"
if ("overlays" in self.board.installs):
overlays = self.board.installs["overlays"]
overlays = " ".join(overlays)
overlays = self.board.parse_variables(overlays)
cmd += f"\tfdtoverlays {overlays}\n"
cmd += f"' >> {extl_fn}"
self.__sudo(["sh", "-c", f"{cmd}"], stdout=subprocess.DEVNULL)
for target in self.board.targets:
target.install_files(out_dir, self.board.out_dir, "boot", self.__copy_file, self.__dd_bin)

3
scripts/sources.py
View File

@ -275,7 +275,8 @@ class Sources:
continue
file_name = self.work_dir + "/" + art["file"]
if ("subdir" in art):
dir_o = out_dir + "/" + art["subdir"] + "/"
subdir = art["subdir"]
dir_o = out_dir + "/" + subdir + "/"
else:
dir_o = out_dir + "/"
os.makedirs(dir_o, exist_ok=True)

6
scripts/target.py
View File

@ -97,9 +97,11 @@ class Target:
for art in self.artifacts:
art_fn = os.path.basename(art["file"])
if (art["store_type"] == part_name):
subdir = ""
if "subdir" in art:
subdir = art["subdir"] + "/"
on_file(f"{tmp_dir}/{subdir}{art_fn}", f"{dir}/{subdir}")
destdir = art["destdir"] + "/"
on_file(f"{tmp_dir}/{subdir}", f"{dir}/{destdir}")
else:
on_file(f"{tmp_dir}/{art_fn}", f"{dir}/")
if (art["store_type"] == "dd"):
on_dd(f"{tmp_dir}/{art_fn}", art["block_size"], int(art["img_offset"]))

84
tmp/rk3566-bigtreetech-pi2.dts
View File

@ -7,40 +7,13 @@
/ {
model = "BigTreeTech Pi 2";
compatible = "bigtreetech,pi2", "rockchip,rk3566";
onewire: onewire {
compatible = "w1-gpio";
gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&gpio_w1>;
status = "disabled";
};
};
&pinctrl {
gpio-w1 {
gpio_w1:gpio-w1 {
rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&scmi_clk {
rockchip,clk-init = <1104000000>;
};
&sfc {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};
};
/* disable all - default state */
&display_subsystem {
status = "disabled";
};
@ -81,67 +54,12 @@
&hdmi_in_vp0 {
status = "disabled";
};
/* HDMI output */
/*&vop {
status = "okay";
};
&vop_mmu {
status = "okay";
};
&display_subsystem {
status = "okay";
};
&hdmi_sound {
status = "okay";
};
&i2s0_8ch {
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_in_vp0 {
status = "okay";
};*/
/* DSI1 output */
/*&vop {
status = "okay";
};
&vop_mmu {
status = "okay";
};
&display_subsystem {
status = "okay";
};
&dsi1 {
status = "okay";
};
&dsi1_panel {
status = "okay";
};
&dsi1_in_vp1 {
status = "okay";
};
&dsi_dphy1 {
status = "okay";
};
&tp_dsi {
status = "okay";
};
&bl_dsi {
status = "okay";
};*/
&i2c3 {
status = "disabled";
};
&i2s0_8ch {
status = "disabled";
};
&pcie2x1 {
status = "disabled";
};

32
tmp/rk3566-dsi1.dtso Normal file
View File

@ -0,0 +1,32 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
/plugin/;
&vop {
status = "okay";
};
&vop_mmu {
status = "okay";
};
&display_subsystem {
status = "okay";
};
&dsi1 {
status = "okay";
};
&dsi1_panel {
status = "okay";
};
&dsi1_in_vp1 {
status = "okay";
};
&dsi_dphy1 {
status = "okay";
};
&tp_dsi {
status = "okay";
};
&bl_dsi {
status = "okay";
};

26
tmp/rk3566-hdmi.dtso Normal file
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@ -0,0 +1,26 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
/plugin/;
&vop {
status = "okay";
};
&vop_mmu {
status = "okay";
};
&display_subsystem {
status = "okay";
};
&hdmi_sound {
status = "okay";
};
&i2s0_8ch {
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_in_vp0 {
status = "okay";
};

8
tmp/rk3566-pcie.dtso Normal file
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@ -0,0 +1,8 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
/plugin/;
&pcie2x1 {
status = "okay";
};

21
tmp/rk3566-sfc-nor.dtso Normal file
View File

@ -0,0 +1,21 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
/plugin/;
&sfc {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};
};
};

25
tmp/rk3566-w1-gpio4-pb2.dtso Normal file
View File

@ -0,0 +1,25 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
/ {
onewire: onewire {
compatible = "w1-gpio";
gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&gpio_w1>;
status = "okay";
};
};
&pinctrl {
gpio-w1 {
gpio_w1:gpio-w1 {
rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

2
tmp/rk356x-base.dtsi
View File

@ -633,7 +633,7 @@
compatible = "rockchip,rk3588-vdec";
reg = <0x0 0xfdf80100 0x0 0x100>, <0x0 0xfdf80200 0x0 0x500>, <0x0 0xfdf80700 0x0 0x100>;
reg-names = "link", "function", "cache";
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH 0>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>, <&cru CLK_RKVDEC_CA>,
<&cru CLK_RKVDEC_CORE>, <&cru CLK_RKVDEC_HEVC_CA>;
clock-names = "axi", "ahb", "cabac", "core", "hevc_cabac";