mirror of
https://github.com/andreili/SBC_builder.git
synced 2025-09-12 08:31:12 +02:00
Final move current BTT Pi2 support to patches.
This commit is contained in:
andreili
parent
ce39de57b4
commit
0a96ad0605
@ -1 +1 @@
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||||
EBUILD klipper-11.ebuild 656 BLAKE2B 0f9fcd5dc3939e6dc2288f6ca740457f422a2cee5d9849188cd9d823872e4712c799d56545547cec548dc7bb079ae35a1f7d586aa78860a13b349ccc2cffaa79 SHA512 ac11acfa93008f791b385bdc19dc411434c14d91560825f0b6bb77a88c7452ddbbba62a8d30cb63dca75df62eac53678e0c666c92e2d7ae0345b17fd21500915
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EBUILD klipper-11.ebuild 675 BLAKE2B afa7fe5a57391a1d7b9e1674b859e9c79d3605a5f01a986fa8464a354db0c15603d8bea67c197f38bdd1a6fd2a5c8f37713baeb5a727e99886976689a9ef3071 SHA512 5250dfb61df6d74e350543b9f0379c9807ad703b09ca84319a46a568fdcc9d52adbda2ddd41fc25a873535589631a857ab77dc993731e2b24943a16934314d49
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@ -29,4 +29,5 @@ RDEPEND="
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media-libs/libv4l
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net-misc/ntp
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sys-apps/i2c-tools
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sys-fs/f2fs-tools
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"
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@ -3,7 +3,7 @@ new file mode 100644
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index 000000000000..51de9e95b7d2
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--- /dev/null
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+++ b/arch/arm64/configs/printer_defconfig
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@@ -0,0 +1,520 @@
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@@ -0,0 +1,521 @@
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+CONFIG_DEFAULT_HOSTNAME="Printer"
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+CONFIG_LOCALVERSION="-arm64"
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+CONFIG_LOCALVERSION_AUTO=n
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@ -346,6 +346,7 @@ index 000000000000..51de9e95b7d2
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+CONFIG_F2FS_FS=y
|
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+CONFIG_F2FS_FS_COMPRESSION=y
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+CONFIG_F2FS_FS_ZSTD=n
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+CONFIG_F2FS_CHECK_FS=y
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+CONFIG_USB_EHCI_HCD_PLATFORM=y
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+CONFIG_USB_OHCI_HCD_PLATFORM=y
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+CONFIG_ARM_ARCH_TIMER=y
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564
patch/kernel/printer_dts_fixes.patch
Normal file
564
patch/kernel/printer_dts_fixes.patch
Normal file
@ -0,0 +1,564 @@
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diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
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index 4bf84622db47..b1a8b52d33c9 100644
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -124,6 +124,11 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-lubancat-1.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-nanopi-r3s.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-bigtreetech-cb2-manta.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-bigtreetech-pi2.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pcie.dtso
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-dsi1.dtso
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-hdmi.dtso
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-sfc-nor.dtso
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-w1-gpio4-pb2.dtso
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb
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@@ -248,3 +253,23 @@ rk3588-rock-5b-pcie-srns-dtbs := rk3588-rock-5b.dtb \
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou-haikou-video-demo.dtb
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rk3588-tiger-haikou-haikou-video-demo-dtbs := rk3588-tiger-haikou.dtb \
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rk3588-tiger-haikou-video-demo.dtbo
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+
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-bigtreetech-pi2-pcie.dtb
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+rk3566-bigtreetech-pi2-pcie-dtbs := rk3566-bigtreetech-pi2.dtb \
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+ rk3566-pcie.dtbo
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+
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-bigtreetech-pi2-dsi1.dtb
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+rk3566-bigtreetech-pi2-dsi1-dtbs := rk3566-bigtreetech-pi2.dtb \
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+ rk3566-dsi1.dtbo
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+
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-bigtreetech-pi2-hdmi.dtb
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+rk3566-bigtreetech-pi2-hdmi-dtbs := rk3566-bigtreetech-pi2.dtb \
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+ rk3566-hdmi.dtbo
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+
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-bigtreetech-pi2-sfc-nor.dtb
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+rk3566-bigtreetech-pi2-sfc-nor-dtbs := rk3566-bigtreetech-pi2.dtb \
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+ rk3566-sfc-nor.dtbo
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+
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-bigtreetech-pi2-w1-gpio4-pb2.dtb
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+rk3566-bigtreetech-pi2-w1-gpio4-pb2-dtbs := rk3566-bigtreetech-pi2.dtb \
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+ rk3566-w1-gpio4-pb2.dtbo
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diff --git a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
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index e7ba477e75f9..5db1b3ca294d 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
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@@ -120,7 +120,7 @@ vcc3v3_pcie: regulator-vcc3v3-pcie {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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enable-active-high;
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- gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
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+ gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_drv>;
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regulator-always-on;
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@@ -251,6 +251,54 @@ &cpu3 {
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cpu-supply = <&vdd_cpu>;
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};
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+&dsi1 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "disabled";
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+
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+ dsi1_panel: panel@0 {
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+ compatible = "btt-pitft";
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+ reg = <0x0>;
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+ status = "disabled";
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+ vddc-supply = <&bl_dsi>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ ports {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ port@0 {
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+ reg = <0>;
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+ panel_in: endpoint {
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+ remote-endpoint = <&mipi_dsi_out>;
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+ };
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+ };
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+ };
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+ };
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+
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+ ports {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ dsi1_in: port@0 {
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+ reg = <0>;
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+
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+ dsi1_in_vp1: endpoint {
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+ remote-endpoint = <&vp1_out_dsi1>;
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+ };
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+ };
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+
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+ dsi1_out: port@1 {
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+ reg = <1>;
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+
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+ mipi_dsi_out: endpoint {
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+ remote-endpoint = <&panel_in>;
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+ };
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+ };
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+ };
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+};
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+
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&gmac1 {
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assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
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@@ -265,6 +313,8 @@ &gmac1m0_rx_bus2
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&gmac1m0_rgmii_clk
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&gmac1m0_clkinout
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&gmac1m0_rgmii_bus>;
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+ tx_delay = <0x19>;
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+ rx_delay = <0x05>;
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status = "okay";
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};
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@@ -280,13 +330,13 @@ rgmii_phy0: phy@0 {
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&gpu {
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mali-supply = <&vdd_gpu>;
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- status = "okay";
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+ status = "disabled";
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};
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&hdmi {
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avdd-0v9-supply = <&vdda0v9_image>;
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avdd-1v8-supply = <&vcca1v8_image>;
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- status = "okay";
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+ status = "disabled";
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};
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&hdmi_in {
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@@ -302,7 +352,7 @@ hdmi_out_con: endpoint {
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};
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&hdmi_sound {
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- status = "okay";
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+ status = "disabled";
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};
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&i2c0 {
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@@ -336,6 +386,7 @@ rk809: pmic@20 {
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#clock-cells = <1>;
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clock-names = "mclk";
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clocks = <&cru I2S1_MCLKOUT_TX>;
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+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
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pinctrl-names = "default", "pmic-sleep",
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"pmic-power-off", "pmic-reset";
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pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
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@@ -558,11 +609,39 @@ codec {
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};
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&i2c2 {
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+ status = "disabled";
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+ clock-frequency = <100000>;
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pinctrl-0 = <&i2c2m1_xfer>;
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+ avdd-1v8-supply = <&vcca1v8_image>;
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+ avdd-0v9-supply = <&vdda0v9_image>;
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+ power-domains = <&power RK3568_PD_VI>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ #size-cells = <0>;
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+
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+ bl_dsi: regulator@45 {
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+ compatible = "raspberrypi,7inch-touchscreen-panel-regulator";
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+ reg = <0x45>;
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+ status = "disabled";
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+ };
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+
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+ tp_dsi: touchscreen@38 {
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+ compatible = "edt,edt-ft5306";
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+ reg = <0x38>;
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+ status = "disabled";
|
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+
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+ vcc-supply = <&vcc3v3_sys>;
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+ iovcc-supply = <&vcc_3v3>;
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+
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+ touchscreen-size-x = <800>;
|
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+ touchscreen-size-y = <480>;
|
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+ touchscreen-inverted-x;
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+ touchscreen-inverted-y;
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+ };
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};
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|
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&i2c3 {
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- status = "okay";
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+ status = "disabled";
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|
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tft_tp: touchscreen@48 {
|
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compatible = "ti,tsc2007";
|
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@@ -575,10 +654,6 @@ tft_tp: touchscreen@48 {
|
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};
|
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};
|
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|
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-&i2s0_8ch {
|
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- status = "okay";
|
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-};
|
||||
-
|
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&i2s1_8ch {
|
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pinctrl-names = "default";
|
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pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
|
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@@ -614,7 +689,7 @@ &pcie2x1 {
|
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pinctrl-0 = <&pcie_reset_h>;
|
||||
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
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vpcie3v3-supply = <&vcc3v3_pcie>;
|
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- status = "okay";
|
||||
+ status = "disabled";
|
||||
};
|
||||
|
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&pinctrl {
|
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@@ -889,11 +964,7 @@ &usb_host1_xhci {
|
||||
&vop {
|
||||
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||||
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||||
- status = "okay";
|
||||
-};
|
||||
-
|
||||
-&vop_mmu {
|
||||
- status = "okay";
|
||||
+ vop-supply = <&vdd_logic>;
|
||||
};
|
||||
|
||||
&vp0 {
|
||||
@@ -902,3 +973,10 @@ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
||||
remote-endpoint = <&hdmi_in_vp0>;
|
||||
};
|
||||
};
|
||||
+
|
||||
+&vp1 {
|
||||
+ vp1_out_dsi1: endpoint@ROCKCHIP_VOP2_EP_MIPI1 {
|
||||
+ reg = <ROCKCHIP_VOP2_EP_MIPI1>;
|
||||
+ remote-endpoint = <&dsi1_in_vp1>;
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts
|
||||
index 7cd444caa18b..ff7df921f0f0 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-pi2.dts
|
||||
@@ -8,3 +8,28 @@ / {
|
||||
model = "BigTreeTech Pi 2";
|
||||
compatible = "bigtreetech,pi2", "rockchip,rk3566";
|
||||
};
|
||||
+
|
||||
+&scmi_clk {
|
||||
+ rockchip,clk-init = <1104000000>;
|
||||
+};
|
||||
+
|
||||
+/* disable all - default state */
|
||||
+&display_subsystem {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+&dsi_dphy1 {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+&vop {
|
||||
+ vop-supply = <&vdd_logic>;
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+&vop_mmu {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+&display_subsystem {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
+&i2s0_8ch {
|
||||
+ status = "disabled";
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-dsi1.dtso b/arch/arm64/boot/dts/rockchip/rk3566-dsi1.dtso
|
||||
new file mode 100644
|
||||
index 000000000000..7c4790908638
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-dsi1.dtso
|
||||
@@ -0,0 +1,32 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+&vop {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+&vop_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+&display_subsystem {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+&dsi1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+&dsi1_panel {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+&dsi1_in_vp1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+&dsi_dphy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+&tp_dsi {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+&bl_dsi {
|
||||
+ status = "okay";
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-hdmi.dtso b/arch/arm64/boot/dts/rockchip/rk3566-hdmi.dtso
|
||||
new file mode 100644
|
||||
index 000000000000..08fb4f254955
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-hdmi.dtso
|
||||
@@ -0,0 +1,26 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+&vop {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+&vop_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+&display_subsystem {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+&hdmi_sound {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+&i2s0_8ch {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+&hdmi {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+&hdmi_in_vp0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pcie.dtso b/arch/arm64/boot/dts/rockchip/rk3566-pcie.dtso
|
||||
new file mode 100644
|
||||
index 000000000000..9cb6e8f03685
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-pcie.dtso
|
||||
@@ -0,0 +1,8 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+&pcie2x1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-sfc-nor.dtso b/arch/arm64/boot/dts/rockchip/rk3566-sfc-nor.dtso
|
||||
new file mode 100644
|
||||
index 000000000000..011850ba18db
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-sfc-nor.dtso
|
||||
@@ -0,0 +1,20 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+&sfc {
|
||||
+ status = "okay";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ flash@0 {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ compatible = "jedec,spi-nor";
|
||||
+ reg = <0>;
|
||||
+ spi-max-frequency = <100000000>;
|
||||
+ spi-rx-bus-width = <4>;
|
||||
+ spi-tx-bus-width = <1>;
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-w1-gpio4-pb2.dtso b/arch/arm64/boot/dts/rockchip/rk3566-w1-gpio4-pb2.dtso
|
||||
new file mode 100644
|
||||
index 000000000000..410763276a6b
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-w1-gpio4-pb2.dtso
|
||||
@@ -0,0 +1,25 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+
|
||||
+/dts-v1/;
|
||||
+/plugin/;
|
||||
+
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+#include <dt-bindings/pinctrl/rockchip.h>
|
||||
+
|
||||
+/ {
|
||||
+ onewire: onewire {
|
||||
+ compatible = "w1-gpio";
|
||||
+ gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&gpio_w1>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ gpio-w1 {
|
||||
+ gpio_w1:gpio-w1 {
|
||||
+ rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
|
||||
index fd2214b6fad4..9e99309eb9bd 100644
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
|
||||
@@ -616,6 +629,26 @@ vepu_mmu: iommu@fdee0800 {
|
||||
#iommu-cells = <0>;
|
||||
};
|
||||
|
||||
+ vdec: video-codec@fdf80200 {
|
||||
+ compatible = "rockchip,rk3588-vdec";
|
||||
+ reg = <0x0 0xfdf80100 0x0 0x100>, <0x0 0xfdf80200 0x0 0x500>, <0x0 0xfdf80700 0x0 0x100>;
|
||||
+ reg-names = "link", "function", "cache";
|
||||
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>, <&cru CLK_RKVDEC_CA>,
|
||||
+ <&cru CLK_RKVDEC_CORE>, <&cru CLK_RKVDEC_HEVC_CA>;
|
||||
+ clock-names = "axi", "ahb", "cabac", "core", "hevc_cabac";
|
||||
+ assigned-clocks = <&cru ACLK_RKVDEC>, <&cru CLK_RKVDEC_CORE>,
|
||||
+ <&cru CLK_RKVDEC_CA>, <&cru CLK_RKVDEC_HEVC_CA>;
|
||||
+ assigned-clock-rates = <297000000>, <297000000>,
|
||||
+ <297000000>, <297000000>;
|
||||
+ resets = <&cru SRST_A_RKVDEC>, <&cru SRST_H_RKVDEC>, <&cru SRST_RKVDEC_CA>,
|
||||
+ <&cru SRST_RKVDEC_CORE>, <&cru SRST_RKVDEC_HEVC_CA>;
|
||||
+ reset-names = "rst_axi", "rst_ahb", "rst_cabac",
|
||||
+ "rst_core", "rst_hevc_cabac";
|
||||
+ power-domains = <&power RK3568_PD_RKVDEC>;
|
||||
+ sram = <&vdec_sram>;
|
||||
+ };
|
||||
+
|
||||
sdmmc2: mmc@fe000000 {
|
||||
compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
|
||||
reg = <0x0 0xfe000000 0x0 0x4000>;
|
||||
@@ -1057,6 +1090,123 @@ rng: rng@fe388000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ otp: otp@fe38c000 {
|
||||
+ compatible = "rockchip,rk3568-otp";
|
||||
+ reg = <0x00 0xfe38c000 0x00 0x4000>;
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <1>;
|
||||
+ clocks = <&cru CLK_OTPC_NS_USR>,
|
||||
+ <&cru CLK_OTPC_NS_SBPI>,
|
||||
+ <&cru PCLK_OTPC_NS>,
|
||||
+ <&cru PCLK_OTPPHY>;
|
||||
+ clock-names = "usr", "sbpi", "apb", "phy";
|
||||
+ resets = <&cru SRST_OTPPHY>;
|
||||
+ reset-names = "otp_phy";
|
||||
+
|
||||
+ cpu_code: cpu-code@2 {
|
||||
+ reg = <0x02 0x02>;
|
||||
+ };
|
||||
+
|
||||
+ specification_serial_number: specification-serial-number@7 {
|
||||
+ reg = <0x07 0x01>;
|
||||
+ bits = <0x00 0x05>;
|
||||
+ };
|
||||
+
|
||||
+ otp_cpu_version: cpu-version@8 {
|
||||
+ reg = <0x08 0x01>;
|
||||
+ bits = <0x03 0x03>;
|
||||
+ };
|
||||
+
|
||||
+ mbist_vmin: mbist-vmin@9 {
|
||||
+ reg = <0x09 0x01>;
|
||||
+ bits = <0x00 0x04>;
|
||||
+ };
|
||||
+
|
||||
+ otp_id: id@a {
|
||||
+ reg = <0x0a 0x10>;
|
||||
+ };
|
||||
+
|
||||
+ cpu_leakage: cpu-leakage@1a {
|
||||
+ reg = <0x1a 0x01>;
|
||||
+ };
|
||||
+
|
||||
+ log_leakage: log-leakage@1b {
|
||||
+ reg = <0x1b 0x01>;
|
||||
+ };
|
||||
+
|
||||
+ npu_leakage: npu-leakage@1c {
|
||||
+ reg = <0x1c 0x01>;
|
||||
+ };
|
||||
+
|
||||
+ gpu_leakage: gpu-leakage@1d {
|
||||
+ reg = <0x1d 0x01>;
|
||||
+ };
|
||||
+
|
||||
+ core_pvtm: core-pvtm@2a {
|
||||
+ reg = <0x2a 0x02>;
|
||||
+ };
|
||||
+
|
||||
+ cpu_tsadc_trim_l: cpu-tsadc-trim-l@2e {
|
||||
+ reg = <0x2e 0x01>;
|
||||
+ };
|
||||
+
|
||||
+ cpu_tsadc_trim_h: cpu-tsadc-trim-h@2f {
|
||||
+ reg = <0x2f 0x01>;
|
||||
+ bits = <0x00 0x04>;
|
||||
+ };
|
||||
+
|
||||
+ gpu_tsadc_trim_l: npu-tsadc-trim-l@30 {
|
||||
+ reg = <0x30 0x01>;
|
||||
+ };
|
||||
+
|
||||
+ gpu_tsadc_trim_h: npu-tsadc-trim-h@31 {
|
||||
+ reg = <0x31 0x01>;
|
||||
+ bits = <0x00 0x04>;
|
||||
+ };
|
||||
+
|
||||
+ tsadc_trim_base_frac: tsadc-trim-base-frac@31 {
|
||||
+ reg = <0x31 0x01>;
|
||||
+ bits = <0x04 0x04>;
|
||||
+ };
|
||||
+
|
||||
+ tsadc_trim_base: tsadc-trim-base@32 {
|
||||
+ reg = <0x32 0x01>;
|
||||
+ };
|
||||
+
|
||||
+ cpu_opp_info: cpu-opp-info@36 {
|
||||
+ reg = <0x36 0x06>;
|
||||
+ };
|
||||
+
|
||||
+ gpu_opp_info: gpu-opp-info@3c {
|
||||
+ reg = <0x3c 0x06>;
|
||||
+ };
|
||||
+
|
||||
+ npu_opp_info: npu-opp-info@42 {
|
||||
+ reg = <0x42 0x06>;
|
||||
+ };
|
||||
+
|
||||
+ dmc_opp_info: dmc-opp-info@48 {
|
||||
+ reg = <0x48 0x06>;
|
||||
+ };
|
||||
+
|
||||
+ remark_spec_serial_number: remark-spec-serial-number@56 {
|
||||
+ reg = <0x56 1>;
|
||||
+ bits = <0 5>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ crypto: crypto@fe380000 {
|
||||
+ compatible = "rockchip,rk3568-crypto";
|
||||
+ reg = <0x0 0xfe380000 0x0 0x2000>;
|
||||
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&cru ACLK_CRYPTO_NS>, <&cru HCLK_CRYPTO_NS>,
|
||||
+ <&cru CLK_CRYPTO_NS_CORE>;
|
||||
+ clock-names = "aclk", "hclk", "core";
|
||||
+ resets = <&cru SRST_CRYPTO_NS_CORE>;
|
||||
+ reset-names = "core";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
i2s0_8ch: i2s@fe400000 {
|
||||
compatible = "rockchip,rk3568-i2s-tdm";
|
||||
reg = <0x0 0xfe400000 0x0 0x1000>;
|
||||
@ -1,10 +0,0 @@
|
||||
--- kernel/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi.old 2025-07-06 20:36:43.730388402 +0200
|
||||
+++ kernel/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi 2025-07-06 20:34:36.687531470 +0200
|
||||
@@ -336,6 +336,7 @@
|
||||
#clock-cells = <1>;
|
||||
clock-names = "mclk";
|
||||
clocks = <&cru I2S1_MCLKOUT_TX>;
|
||||
+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
|
||||
pinctrl-names = "default", "pmic-sleep",
|
||||
"pmic-power-off", "pmic-reset";
|
||||
pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
|
||||
@ -1,35 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
#include "rk356x-base.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "rockchip,rk3566";
|
||||
};
|
||||
|
||||
&pipegrf {
|
||||
compatible = "rockchip,rk3566-pipe-grf", "syscon";
|
||||
};
|
||||
|
||||
&power {
|
||||
power-domain@RK3568_PD_PIPE {
|
||||
reg = <RK3568_PD_PIPE>;
|
||||
clocks = <&cru PCLK_PIPE>;
|
||||
pm_qos = <&qos_pcie2x1>,
|
||||
<&qos_sata1>,
|
||||
<&qos_sata2>,
|
||||
<&qos_usb3_0>,
|
||||
<&qos_usb3_1>;
|
||||
#power-domain-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb_host0_xhci {
|
||||
phys = <&usb2phy0_otg>;
|
||||
phy-names = "usb2-phy";
|
||||
extcon = <&usb2phy0>;
|
||||
maximum-speed = "high-speed";
|
||||
};
|
||||
|
||||
&vop {
|
||||
compatible = "rockchip,rk3566-vop";
|
||||
};
|
||||
@ -1,981 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
#include <dt-bindings/soc/rockchip,vop2.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include "rk3566.dtsi"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
ethernet0 = &gmac1;
|
||||
mmc0 = &sdhci;
|
||||
mmc1 = &sdmmc0;
|
||||
};
|
||||
|
||||
chosen: chosen {
|
||||
stdout-path = "serial2:1500000n8";
|
||||
};
|
||||
|
||||
ext_cam_clk: clock-25000000-cam {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <25000000>;
|
||||
clock-output-names = "ext_cam_clk";
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
can_mcp2515_osc: clock-8000000-mcp2515 {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <8000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
hdmi-con {
|
||||
compatible = "hdmi-connector";
|
||||
type = "a";
|
||||
|
||||
port {
|
||||
hdmi_con_in: endpoint {
|
||||
remote-endpoint = <&hdmi_out_con>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
leds: leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-0 {
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
function = LED_FUNCTION_POWER;
|
||||
gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-on";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 =<&blue_led>;
|
||||
};
|
||||
|
||||
led-1 {
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_HEARTBEAT;
|
||||
gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 =<&heartbeat_led>;
|
||||
};
|
||||
};
|
||||
|
||||
fan: pwm-fan {
|
||||
compatible = "pwm-fan";
|
||||
#cooling-cells = <2>;
|
||||
cooling-levels = <0 50 100 150 200 255>;
|
||||
pwms = <&pwm7 0 50000 0>;
|
||||
};
|
||||
|
||||
rk809-sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,name = "Analog RK809";
|
||||
simple-audio-card,mclk-fs = <256>;
|
||||
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&i2s1_8ch>;
|
||||
};
|
||||
|
||||
simple-audio-card,codec {
|
||||
sound-dai = <&rk809>;
|
||||
};
|
||||
};
|
||||
|
||||
sdio_pwrseq: sdio-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
clocks = <&rk809 1>;
|
||||
clock-names = "ext_clock";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_enable_h>;
|
||||
post-power-on-delay-ms = <200>;
|
||||
reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
vbus: regulator-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbus";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
vcc12v_dcin: regulator-vcc12v-dcin {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc12v_dcin";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
};
|
||||
|
||||
vcc3v3_pcie: regulator-vcc3v3-pcie {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_pcie";
|
||||
enable-active-high;
|
||||
gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie_drv>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vcc12v_dcin>;
|
||||
};
|
||||
|
||||
vcc3v3_sys: regulator-vcc3v3-sys {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_sys";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vbus>;
|
||||
};
|
||||
|
||||
vcc5v0_host: regulator-vcc5v0-host {
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-high;
|
||||
gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc5v0_host_en>;
|
||||
regulator-name = "vcc5v0_host3";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
vcc5v0_otg: regulator-vcc5v0-otg {
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-high;
|
||||
gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc5v0_otg_en>;
|
||||
regulator-name = "vcc5v0_otg3";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
vcc5v0_sys: regulator-vcc5v0-sys {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_sys";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vbus>;
|
||||
};
|
||||
|
||||
vcc5v0_usb: regulator-vcc5v0-usb {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_usb";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vbus>;
|
||||
};
|
||||
|
||||
vcc5v0_usb2b: regulator-vcc5v0-usb2b {
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-high;
|
||||
gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc5v0_usb2b_en>;
|
||||
regulator-name = "vcc5v0_usb2b";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
vcc5v0_usb2t: regulator-vcc5v0-usb2t {
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-high;
|
||||
gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc5v0_usb2t_en>;
|
||||
regulator-name = "vcc5v0_usb2t";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
vcc_5v: regulator-vcc-5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_5v";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vcc12v_dcin>;
|
||||
};
|
||||
|
||||
vcc_sd: regulator-vcc-sd {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-name = "vcc_sd";
|
||||
vin-supply = <&vcc3v3_sys>;
|
||||
};
|
||||
};
|
||||
|
||||
&combphy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&combphy2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <&vdd_cpu>;
|
||||
};
|
||||
|
||||
&cpu1 {
|
||||
cpu-supply = <&vdd_cpu>;
|
||||
};
|
||||
|
||||
&cpu2 {
|
||||
cpu-supply = <&vdd_cpu>;
|
||||
};
|
||||
|
||||
&cpu3 {
|
||||
cpu-supply = <&vdd_cpu>;
|
||||
};
|
||||
|
||||
&dsi1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dsi1_panel: panel@0 {
|
||||
compatible = "btt-pitft";
|
||||
reg = <0x0>;
|
||||
status = "disabled";
|
||||
vddc-supply = <&bl_dsi>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&mipi_dsi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dsi1_in: port@0 {
|
||||
reg = <0>;
|
||||
|
||||
dsi1_in_vp1: endpoint {
|
||||
remote-endpoint = <&vp1_out_dsi1>;
|
||||
};
|
||||
};
|
||||
|
||||
dsi1_out: port@1 {
|
||||
reg = <1>;
|
||||
|
||||
mipi_dsi_out: endpoint {
|
||||
remote-endpoint = <&panel_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gmac1 {
|
||||
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
|
||||
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
|
||||
assigned-clock-rates = <0>, <125000000>;
|
||||
clock_in_out = "input";
|
||||
phy-handle = <&rgmii_phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac1m0_miim
|
||||
&gmac1m0_tx_bus2
|
||||
&gmac1m0_rx_bus2
|
||||
&gmac1m0_rgmii_clk
|
||||
&gmac1m0_clkinout
|
||||
&gmac1m0_rgmii_bus>;
|
||||
tx_delay = <0x19>;
|
||||
rx_delay = <0x05>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio1 {
|
||||
rgmii_phy0: phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reset-delay-us = <20000>;
|
||||
reset-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
|
||||
reset-post-delay-us = <100000>;
|
||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpu {
|
||||
mali-supply = <&vdd_gpu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
avdd-0v9-supply = <&vdda0v9_image>;
|
||||
avdd-1v8-supply = <&vcca1v8_image>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&hdmi_in {
|
||||
hdmi_in_vp0: endpoint {
|
||||
remote-endpoint = <&vp0_out_hdmi>;
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi_out {
|
||||
hdmi_out_con: endpoint {
|
||||
remote-endpoint = <&hdmi_con_in>;
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi_sound {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
|
||||
vdd_cpu: regulator@1c {
|
||||
compatible = "tcs,tcs4525";
|
||||
reg = <0x1c>;
|
||||
regulator-name = "vdd_cpu";
|
||||
regulator-min-microvolt = <712500>;
|
||||
regulator-max-microvolt = <1390000>;
|
||||
regulator-initial-mode = <1>;
|
||||
regulator-ramp-delay = <2300>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
fcs,suspend-voltage-selector = <1>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
rk809: pmic@20 {
|
||||
compatible = "rockchip,rk809";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
|
||||
assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
|
||||
#clock-cells = <1>;
|
||||
clock-names = "mclk";
|
||||
clocks = <&cru I2S1_MCLKOUT_TX>;
|
||||
clock-output-names = "rk808-clkout1", "rk808-clkout2";
|
||||
pinctrl-names = "default", "pmic-sleep",
|
||||
"pmic-power-off", "pmic-reset";
|
||||
pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
|
||||
#sound-dai-cells = <0>;
|
||||
system-power-controller;
|
||||
wakeup-source;
|
||||
|
||||
vcc1-supply = <&vcc3v3_sys>;
|
||||
vcc2-supply = <&vcc3v3_sys>;
|
||||
vcc3-supply = <&vcc3v3_sys>;
|
||||
vcc4-supply = <&vcc3v3_sys>;
|
||||
vcc5-supply = <&vcc3v3_sys>;
|
||||
vcc6-supply = <&vcc3v3_sys>;
|
||||
vcc7-supply = <&vcc3v3_sys>;
|
||||
vcc8-supply = <&vcc3v3_sys>;
|
||||
vcc9-supply = <&vcc3v3_sys>;
|
||||
|
||||
regulators {
|
||||
vdd_logic: DCDC_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vdd_logic";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_gpu: DCDC_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vdd_gpu";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_ddr: DCDC_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vcc_ddr";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_npu: DCDC_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vdd_npu";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda0v9_image: LDO_REG1 {
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-name = "vdda0v9_image";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda_0v9: LDO_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-name = "vdda_0v9";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda0v9_pmu: LDO_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-name = "vdda0v9_pmu";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <900000>;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_acodec: LDO_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-name = "vccio_acodec";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_sd: LDO_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vccio_sd";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_pmu: LDO_REG6 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vcc3v3_pmu";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcca_1v8: LDO_REG7 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcca_1v8";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_pmu: LDO_REG8 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcca1v8_pmu";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_image: LDO_REG9 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcca1v8_image";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8: DCDC_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcc_1v8";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3: SWITCH_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "vcc_3v3";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_sd: SWITCH_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "vcc3v3_sd";
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
codec {
|
||||
rockchip,mic-in-differential;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-0 = <&i2c2m1_xfer>;
|
||||
avdd-1v8-supply = <&vcca1v8_image>;
|
||||
avdd-0v9-supply = <&vdda0v9_image>;
|
||||
power-domains = <&power RK3568_PD_VI>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
|
||||
bl_dsi: regulator@45 {
|
||||
compatible = "raspberrypi,7inch-touchscreen-panel-regulator";
|
||||
reg = <0x45>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tp_dsi: touchscreen@38 {
|
||||
compatible = "edt,edt-ft5306";
|
||||
reg = <0x38>;
|
||||
status = "disabled";
|
||||
|
||||
vcc-supply = <&vcc3v3_sys>;
|
||||
iovcc-supply = <&vcc_3v3>;
|
||||
|
||||
touchscreen-size-x = <800>;
|
||||
touchscreen-size-y = <480>;
|
||||
touchscreen-inverted-x;
|
||||
touchscreen-inverted-y;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "disabled";
|
||||
|
||||
tft_tp: touchscreen@48 {
|
||||
compatible = "ti,tsc2007";
|
||||
reg = <0x48>;
|
||||
status = "okay";
|
||||
ti,x-plate-ohms = <660>;
|
||||
ti,rt-thr = <3000>;
|
||||
ti,fuzzx = <32>;
|
||||
ti,fuzzy = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2s1_8ch {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
|
||||
rockchip,trcm-sync-tx-only;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
|
||||
|
||||
can_mcp2515: can@0 {
|
||||
compatible = "microchip,mcp2515";
|
||||
reg = <0x00>;
|
||||
clocks = <&can_mcp2515_osc>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcp2515_int_pin>;
|
||||
spi-max-frequency = <10000000>;
|
||||
vdd-supply = <&vcc3v3_sys>;
|
||||
xceiver-supply = <&vcc3v3_sys>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi3m1_cs0 &spi3m1_pins>;
|
||||
};
|
||||
|
||||
&pcie2x1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie_reset_h>;
|
||||
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
bt {
|
||||
bt_enable: bt-enable-h {
|
||||
rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
|
||||
bt_host_wake: bt-host-wake-l {
|
||||
rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
|
||||
bt_wake: bt-wake-l {
|
||||
rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie {
|
||||
pcie_drv: pcie-drv {
|
||||
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
pcie_reset_h: pcie-reset-h {
|
||||
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
pmic {
|
||||
pmic_int: pmic-int {
|
||||
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
sdio-pwrseq {
|
||||
wifi_enable_h: wifi-enable-h {
|
||||
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
wifi_host_wake: wifi-host-wake-l {
|
||||
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
|
||||
usb {
|
||||
vcc5v0_host_en: vcc5v0-host-en {
|
||||
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
vcc5v0_otg_en: vcc5v0-otg-en {
|
||||
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
vcc5v0_usb2t_en: vcc5v0-usb2t-en {
|
||||
rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
vcc5v0_usb2b_en: vcc5v0-usb2b-en {
|
||||
rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
work-led {
|
||||
heartbeat_led: led-heartbeat {
|
||||
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
blue_led: led-blue {
|
||||
rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
mcp2515 {
|
||||
mcp2515_int_pin: mcp2515-int-pin {
|
||||
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pmu_io_domains {
|
||||
pmuio1-supply = <&vcc3v3_pmu>;
|
||||
pmuio2-supply = <&vcc3v3_pmu>;
|
||||
vccio1-supply = <&vcc_3v3>;
|
||||
vccio2-supply = <&vcc_1v8>;
|
||||
vccio3-supply = <&vccio_sd>;
|
||||
vccio4-supply = <&vcc_1v8>;
|
||||
vccio5-supply = <&vcc_3v3>;
|
||||
vccio6-supply = <&vcc_3v3>;
|
||||
vccio7-supply = <&vcc_3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm0m1_pins>;
|
||||
};
|
||||
|
||||
&pwm12 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm12m1_pins>;
|
||||
};
|
||||
|
||||
&pwm13 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm13m1_pins>;
|
||||
};
|
||||
|
||||
&pwm14 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm14m1_pins>;
|
||||
};
|
||||
|
||||
&pwm15 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm15m1_pins>;
|
||||
};
|
||||
|
||||
&saradc {
|
||||
vref-supply = <&vcca_1v8>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
bus-width = <8>;
|
||||
max-frequency = <200000000>;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc0 {
|
||||
max-frequency = <150000000>;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
vmmc-supply = <&vcc_sd>;
|
||||
vqmmc-supply = <&vccio_sd>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
/* WiFi & BT combo module AMPAK AP6256 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
disable-wp;
|
||||
keep-power-in-suspend;
|
||||
max-frequency = <150000000>;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
|
||||
rockchip,default-sample-phase = <90>;
|
||||
status = "okay";
|
||||
|
||||
wifi@1 {
|
||||
compatible = "brcm,bcm4329-fmac";
|
||||
reg = <1>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "host-wake";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_host_wake>;
|
||||
brcm,drive-strength = <10>;
|
||||
};
|
||||
};
|
||||
|
||||
&sfc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
dma-names = "tx","rx";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "brcm,bcm4345c5";
|
||||
clocks = <&rk809 1>;
|
||||
clock-names = "lpo";
|
||||
device-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
|
||||
host-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
|
||||
shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&bt_host_wake &bt_wake &bt_enable>;
|
||||
vbat-supply = <&vcc3v3_sys>;
|
||||
vddio-supply = <&vcca1v8_pmu>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart5m1_xfer>;
|
||||
};
|
||||
|
||||
&uart7 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart7m2_xfer>;
|
||||
};
|
||||
|
||||
&usb2phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy0_host {
|
||||
phy-supply = <&vcc5v0_host>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy0_otg {
|
||||
phy-supply = <&vcc5v0_otg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy1_host {
|
||||
phy-supply = <&vcc5v0_usb2t>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2phy1_otg {
|
||||
phy-supply = <&vcc5v0_usb2b>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_xhci {
|
||||
dr_mode = "host";
|
||||
extcon = <&usb2phy0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_xhci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vop {
|
||||
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||||
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||||
vop-supply = <&vdd_logic>;
|
||||
};
|
||||
|
||||
&vp0 {
|
||||
vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
||||
reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
||||
remote-endpoint = <&hdmi_in_vp0>;
|
||||
};
|
||||
};
|
||||
|
||||
&vp1 {
|
||||
vp1_out_dsi1: endpoint@ROCKCHIP_VOP2_EP_MIPI1 {
|
||||
reg = <ROCKCHIP_VOP2_EP_MIPI1>;
|
||||
remote-endpoint = <&dsi1_in_vp1>;
|
||||
};
|
||||
};
|
||||
@ -1,65 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rk3566-bigtreetech-cb2.dtsi"
|
||||
|
||||
/ {
|
||||
model = "BigTreeTech Pi 2";
|
||||
compatible = "bigtreetech,pi2", "rockchip,rk3566";
|
||||
};
|
||||
|
||||
&scmi_clk {
|
||||
rockchip,clk-init = <1104000000>;
|
||||
};
|
||||
|
||||
/* disable all - default state */
|
||||
&display_subsystem {
|
||||
status = "disabled";
|
||||
};
|
||||
&dsi1 {
|
||||
status = "disabled";
|
||||
};
|
||||
&dsi1_panel {
|
||||
status = "disabled";
|
||||
};
|
||||
&dsi1_in_vp1 {
|
||||
status = "disabled";
|
||||
};
|
||||
&dsi_dphy1 {
|
||||
status = "disabled";
|
||||
};
|
||||
&tp_dsi {
|
||||
status = "disabled";
|
||||
};
|
||||
&bl_dsi {
|
||||
status = "disabled";
|
||||
};
|
||||
&vop {
|
||||
vop-supply = <&vdd_logic>;
|
||||
status = "disabled";
|
||||
};
|
||||
&vop_mmu {
|
||||
status = "disabled";
|
||||
};
|
||||
&display_subsystem {
|
||||
status = "disabled";
|
||||
};
|
||||
&hdmi_sound {
|
||||
status = "disabled";
|
||||
};
|
||||
&hdmi {
|
||||
status = "disabled";
|
||||
};
|
||||
&hdmi_in_vp0 {
|
||||
status = "disabled";
|
||||
};
|
||||
&i2c3 {
|
||||
status = "disabled";
|
||||
};
|
||||
&i2s0_8ch {
|
||||
status = "disabled";
|
||||
};
|
||||
&pcie2x1 {
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1,32 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
&vop {
|
||||
status = "okay";
|
||||
};
|
||||
&vop_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
&display_subsystem {
|
||||
status = "okay";
|
||||
};
|
||||
&dsi1 {
|
||||
status = "okay";
|
||||
};
|
||||
&dsi1_panel {
|
||||
status = "okay";
|
||||
};
|
||||
&dsi1_in_vp1 {
|
||||
status = "okay";
|
||||
};
|
||||
&dsi_dphy1 {
|
||||
status = "okay";
|
||||
};
|
||||
&tp_dsi {
|
||||
status = "okay";
|
||||
};
|
||||
&bl_dsi {
|
||||
status = "okay";
|
||||
};
|
||||
@ -1,26 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
&vop {
|
||||
status = "okay";
|
||||
};
|
||||
&vop_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
&display_subsystem {
|
||||
status = "okay";
|
||||
};
|
||||
&hdmi_sound {
|
||||
status = "okay";
|
||||
};
|
||||
&i2s0_8ch {
|
||||
status = "okay";
|
||||
};
|
||||
&hdmi {
|
||||
status = "okay";
|
||||
};
|
||||
&hdmi_in_vp0 {
|
||||
status = "okay";
|
||||
};
|
||||
@ -1,8 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
&pcie2x1 {
|
||||
status = "okay";
|
||||
};
|
||||
@ -1,21 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
&sfc {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <100000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -1,25 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
|
||||
/ {
|
||||
onewire: onewire {
|
||||
compatible = "w1-gpio";
|
||||
gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio_w1>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
gpio-w1 {
|
||||
gpio_w1:gpio-w1 {
|
||||
rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
107
tmp/rk3566.dtsi
107
tmp/rk3566.dtsi
@ -1,107 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
#include "rk3566-base.dtsi"
|
||||
|
||||
/ {
|
||||
cpu0_opp_table: opp-table-0 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-408000000 {
|
||||
opp-hz = /bits/ 64 <408000000>;
|
||||
opp-microvolt = <850000 850000 1150000>;
|
||||
clock-latency-ns = <40000>;
|
||||
};
|
||||
|
||||
opp-600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <850000 850000 1150000>;
|
||||
clock-latency-ns = <40000>;
|
||||
};
|
||||
|
||||
opp-816000000 {
|
||||
opp-hz = /bits/ 64 <816000000>;
|
||||
opp-microvolt = <850000 850000 1150000>;
|
||||
clock-latency-ns = <40000>;
|
||||
opp-suspend;
|
||||
};
|
||||
|
||||
opp-1104000000 {
|
||||
opp-hz = /bits/ 64 <1104000000>;
|
||||
opp-microvolt = <900000 900000 1150000>;
|
||||
clock-latency-ns = <40000>;
|
||||
};
|
||||
|
||||
opp-1416000000 {
|
||||
opp-hz = /bits/ 64 <1416000000>;
|
||||
opp-microvolt = <1025000 1025000 1150000>;
|
||||
clock-latency-ns = <40000>;
|
||||
};
|
||||
|
||||
opp-1608000000 {
|
||||
opp-hz = /bits/ 64 <1608000000>;
|
||||
opp-microvolt = <1100000 1100000 1150000>;
|
||||
clock-latency-ns = <40000>;
|
||||
};
|
||||
|
||||
opp-1800000000 {
|
||||
opp-hz = /bits/ 64 <1800000000>;
|
||||
opp-microvolt = <1150000 1150000 1150000>;
|
||||
clock-latency-ns = <40000>;
|
||||
};
|
||||
};
|
||||
|
||||
gpu_opp_table: opp-table-1 {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
opp-microvolt = <850000 850000 1000000>;
|
||||
};
|
||||
|
||||
opp-300000000 {
|
||||
opp-hz = /bits/ 64 <300000000>;
|
||||
opp-microvolt = <850000 850000 1000000>;
|
||||
};
|
||||
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <850000 850000 1000000>;
|
||||
};
|
||||
|
||||
opp-600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <900000 900000 1000000>;
|
||||
};
|
||||
|
||||
opp-700000000 {
|
||||
opp-hz = /bits/ 64 <700000000>;
|
||||
opp-microvolt = <950000 950000 1000000>;
|
||||
};
|
||||
|
||||
opp-800000000 {
|
||||
opp-hz = /bits/ 64 <800000000>;
|
||||
opp-microvolt = <1000000 1000000 1000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
};
|
||||
|
||||
&cpu1 {
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
};
|
||||
|
||||
&cpu2 {
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
};
|
||||
|
||||
&cpu3 {
|
||||
operating-points-v2 = <&cpu0_opp_table>;
|
||||
};
|
||||
|
||||
&gpu {
|
||||
operating-points-v2 = <&gpu_opp_table>;
|
||||
};
|
||||
2024
tmp/rk356x-base.dtsi
2024
tmp/rk356x-base.dtsi
File diff suppressed because it is too large
Load Diff
Loading…
x
Reference in New Issue
Block a user