From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: John Doe <john.doe@somewhere.on.planet>
Date: Tue, 28 Jan 2025 12:13:35 +0800
Subject: Patching NanoPi-R3S LEDs

Signed-off-by: John Doe <john.doe@somewhere.on.planet>
---
 arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts | 41 +++++++---
 drivers/net/ethernet/realtek/r8169_main.c          | 11 +++
 drivers/net/phy/realtek/realtek_main.c             | 11 +++
 3 files changed, 53 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts b/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
@@ -52,19 +52,21 @@ power_led: led-0 {
 			color = <LED_COLOR_ID_RED>;
 			function = LED_FUNCTION_POWER;
 			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
-			default-state = "on";
+			linux,default-trigger = "heartbeat";
 		};
 
 		lan_led: led-1 {
 			color = <LED_COLOR_ID_GREEN>;
 			function = LED_FUNCTION_LAN;
 			gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "r8169-0-100:00:link";
 		};
 
 		wan_led: led-2 {
 			color = <LED_COLOR_ID_GREEN>;
 			function = LED_FUNCTION_WAN;
 			gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "stmmac-0:01:link";
 		};
 	};
 
@@ -137,18 +139,27 @@ &cpu3 {
 };
 
 &gmac1 {
+	phy-mode = "rgmii";
+	clock_in_out = "output";
+
+	snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	/* Reset time is 15ms, 50ms for rtl8211f */
+	snps,reset-delays-us = <0 15000 50000>;
 	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
 	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
 	assigned-clock-rates = <0>, <125000000>;
-	clock_in_out = "output";
-	phy-mode = "rgmii-id";
-	phy-handle = <&rgmii_phy1>;
+
 	pinctrl-names = "default";
 	pinctrl-0 = <&gmac1m0_miim
 		     &gmac1m0_tx_bus2_level3
 		     &gmac1m0_rx_bus2
 		     &gmac1m0_rgmii_clk_level2
 		     &gmac1m0_rgmii_bus_level3>;
+	tx_delay = <0x3c>;
+	rx_delay = <0x2f>;
+
+	phy-handle = <&rgmii_phy1>;
 	status = "okay";
 };
 
@@ -409,10 +420,8 @@ rgmii_phy1: ethernet-phy@1 {
 		interrupt-parent = <&gpio4>;
 		interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&eth_phy_reset_pin>;
-		reset-assert-us = <20000>;
-		reset-deassert-us = <100000>;
-		reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+		pinctrl-0 = <&gmac_int>;
+		realtek,ledsel = <0xae00>;
 	};
 };
 
@@ -421,6 +430,18 @@ &pcie2x1 {
 	pinctrl-0 = <&pcie_reset_h>;
 	reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
 	status = "okay";
+	
+	pcie@0,0 {
+		reg = <0x00000000 0 0 0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+
+		r8169: pcie@1,0 {
+			reg = <0x000000 0 0 0 0>;
+			local-mac-address = [ 00 00 00 00 00 00 ];
+			realtek,ledsel = <0x870>;
+		};
+	};
 };
 
 &pinctrl {
@@ -439,8 +460,8 @@ wan_led_pin: wan-led-pin {
 	};
 
 	gmac {
-		eth_phy_reset_pin: eth-phy-reset-pin {
-			rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
+		gmac_int: gmac-int {
+			rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
 
diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
index 111111111111..222222222222 100644
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -21,6 +21,7 @@
 #include <linux/in.h>
 #include <linux/io.h>
 #include <linux/ip.h>
+#include <linux/of.h>
 #include <linux/tcp.h>
 #include <linux/interrupt.h>
 #include <linux/dma-mapping.h>
@@ -2436,6 +2437,15 @@ void r8169_apply_firmware(struct rtl8169_private *tp)
 	}
 }
 
+static void rtl8168_led_of_init(struct rtl8169_private *tp)
+{
+	struct device *d = tp_to_dev(tp);
+	u32 val;
+
+	if (!of_property_read_u32(d->of_node, "realtek,ledsel", &val))
+		RTL_W16(tp, LED_CTRL, val);
+}
+
 static void rtl8168_config_eee_mac(struct rtl8169_private *tp)
 {
 	/* Adjust EEE LED frequency */
@@ -3421,6 +3431,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
 	rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000);
 
 	rtl8168_config_eee_mac(tp);
+	rtl8168_led_of_init(tp);
 
 	RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~PFM_EN);
 	RTL_W8(tp, MISC_1, RTL_R8(tp, MISC_1) & ~PFM_D3COLD_EN);
diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
index 111111111111..222222222222 100644
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -125,6 +125,15 @@ static int rtl821x_write_page(struct phy_device *phydev, int page)
 	return __phy_write(phydev, RTL821x_PAGE_SELECT, page);
 }
 
+static void rtl821x_led_of_init(struct phy_device *phydev)
+{
+	struct device *dev = &phydev->mdio.dev;
+	u32 val;
+
+	if (!of_property_read_u32(dev->of_node, "realtek,ledsel", &val))
+		phy_write_paged(phydev, 0xd04, 0x10, val);
+}
+
 static int rtl821x_probe(struct phy_device *phydev)
 {
 	struct device *dev = &phydev->mdio.dev;
@@ -444,6 +453,8 @@ static int rtl8211f_config_init(struct phy_device *phydev)
 			val_rxdly ? "enabled" : "disabled");
 	}
 
+	rtl821x_led_of_init(phydev);
+
 	if (priv->has_phycr2) {
 		ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,
 				       RTL8211F_CLKOUT_EN, priv->phycr2);
-- 
Armbian

