This document describes overlays provided in the kernel packages
For generic Armbian overlays documentation please see
https://docs.armbian.com/User-Guide_Allwinner_overlays/

### Platform:

rockchip (Rockchip)

### Provided overlays:

- i2c7, i2c8, pcie-gen2, spi-spidev, uart4, w1-gpio

for RK3308 (Rock PI-S)

- rk3308bs rk3308bs-1.3ghz sdio-10mhz sdio-4mhz emmc

### Overlay details:

### mkspi-disable-lcd-spi

DTBO to disable spi_for_{lcd,touch} when enabling uart1

### i2c7

Activates TWI/I2C bus 7

I2C7 pins (SCL, SDA): GPIO2-B0, GPIO2-A7 GPIO1-C5, GPIO1-C4

### i2c8

Activates TWI/I2C bus 8

I2C8 pins (SCL, SDA): GPIO1-C5, GPIO1-C4

### pcie-gen2

Enables PCIe Gen2 link speed on RK3399.
WARNING! Not officially supported by Rockchip!!!

### rk3328-i2c0

Activates TWI/I2C bus 0

I2C0 (SCL, SDA): GPIO2-D0, GPIO2-D1

### rk3328-uart1

Activates UART1

UART1 pins (RX, TX): GPIO3_A6, GPIO3_A4

### rk3328-opp-1.4ghz

Adds the 1.4GHz opp for overclocking
WARNING! Not officially supported by Rockchip!!!

### rk3328-opp-1.5ghz

Adds the 1.5GHz opp for overclocking
WARNING! Not officially supported by Rockchip!!!

### rk3399-opp-2ghz

Adds the 2GHz big and 1.5 GHz LITTLE opps for overclocking
WARNING! Not officially supported by Rockchip!!!

### rockpi4cplus-usb-host

Switches the top USB 3.0 port to host mode.
WARNING! Not officially supported by Rockchip!!!

### spi-jedec-nor

Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus
supported by the kernel SPI NOR driver

SPI 0 pins (MOSI, MISO, SCK, CS): GPIO3_A5, GPIO3_A4, GPIO3_A6, GPIO3_A7
SPI 1 pins (MOSI, MISO, SCK, CS): GPIO1_A7, GPIO1_B0, GPIO1_B1, GPIO1_B2
SPI 2 pins (MOSI, MISO, SCK, CS): GPIO1_C0, GPIO1_B7, GPIO1_C1, GPIO1_C2
SPI 3 pins (MOSI, MISO, SCK, CS): GPIO2_B2, GPIO2_B1, GPIO2_B3, GPIO2_B4

Parameters:

param_spinor_spi_bus (int)
	SPI bus to activate SPI NOR flash support on
	Required
	Supported values: 0, 1, 2

param_spinor_max_freq (int)
	Maximum SPI frequency
	Optional
	Default: 1000000
	Range: 3000 - 100000000

### spi-spidev

Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access,
where X is the bus number and Y is the CS number

SPI 0 pins (MOSI, MISO, SCK, CS): GPIO3_A5, GPIO3_A4, GPIO3_A6, GPIO3_A7
SPI 1 pins (MOSI, MISO, SCK, CS): GPIO1_A7, GPIO1_B0, GPIO1_B1, GPIO1_B2
SPI 2 pins (MOSI, MISO, SCK, CS): GPIO1_C0, GPIO1_B7, GPIO1_C1, GPIO1_C2
SPI 3 pins (MOSI, MISO, SCK, CS): GPIO2_B2, GPIO2_B1, GPIO2_B3, GPIO2_B4

Parameters:

param_spidev_spi_bus (int)
	SPI bus to activate SPIdev support on
	Required
	Supported values: 0, 1

param_spidev_spi_cs (int)
	SPI chip select number
	Optional
	Default: 0
	Supported values: 0, 1
	Using chip select 1 requires using "spi-add-cs1" overlay

param_spidev_max_freq (int)
	Maximum SPIdev frequency
	Optional
	Default: 1000000
	Range: 3000 - 100000000

### uart4

Activates UART4

UART4 pins (RX, TX): GPIO1_A7, GPIO1_B0

Notice: UART4 cannot be activated together with SPI1 - they share the sam pins.
Enabling this overlay disables SPI1.

### dwc3-0-host

Forces port 0 of the DesignWare xHCI controller to host mode.

This can be used on plaforms such as NanoPC-T4, where devices plugged into the
USB-C port may not be detected otherwise.

### w1-gpio

Activates 1-Wire GPIO master
Requires an external pull-up resistor on the data pin
or enabling the internal pull-up

### rk3318-box-led-conf1

Activates led/gpio configuration for rk3318 tv box boards with signature
YX_RK3328 and clones

### rk3318-box-led-conf2

Activates led/gpio configuration for rk3318 tv box boards withs signature
X88_PRO_B and clones

### rk3318-box-led-conf3

This device tree overlay is suitable for MXQ-RK3328-D4_A board which
has an integrated PMIC (RK805). The dtbo is very important to achieve
1.3 Ghz speed for CPU and stable voltages for other parts of the
system. Also enables gpio leds and keys.

### rk3318-box-led-conf4

Generic rk3318-box configuration but with sdio chip on sdmmc-ext connector

### rk3318-box-emmc-ddr

Activates eMMC DDR capability for rk3318 tv box boards. Probably all the eMMC chips
nowadays support DDR mode, but its reliability heavily depends upon the quality
of board wiring

### rk3318-box-emmc-hs200

Activates eMMC HS200 capability for rk3318 tv box boards.
It should in autodetect mode, but some board have faulty or cheap circuitry that
enable the mode but then it doesn't work correctly.

### rk3318-box-wlan-ap6334

Set up additional device tree bits to properly support ap6334 (broadcom BCM4334)
wifi chip and clones

### rk3318-box-wlan-ext

Use sdmmc_ext device for sdio devices, enabled wifi on some boards (notably
X88 Pro) which have wifi chip attached to sdmmc_ext controller.

### rk3318-box-wlan-ap6330

Set up additional device tree bits properly support ap6330 (broaccom BCM4330)
wifi + bt chip and clones.

### rk3318-box-cpu-hs

Enable additional cpu "high-speed" bins up to 1.3ghz

**********************************
Details for Rock Pi-S overlays  (2 Mar 2024):

Older V1.1 and V1.2 boards use the B variant of the RK3308.
Some V1.3 boards manufactured after October 2023 also use the B variant.
To overclock the RK3308B, apply:
###  rk3308-b@1.3ghz

V1.3 boards produced during 2022 and most of 2023 use the lower voltage
B-S variant of the RK3308.
Per Radxa, these chips will be marked RK3308BS instead of RK3308B
All boards utilizing the RK3308B-S part should apply the:
###  rk3308-bs
overlay to operate at the appropriate (lower) the core voltage.
This overlay also enables operation at 1.1Ghz.

Optionally, boards utilizing the RK3308B-S parts may add the
###  rk3308-bs@1.3ghz
to overclock the B-S CPU to 1.3Ghz.
Apply the rk3308-bs@1.3Ghz overlay  *after applying*  rk3308-bs

Applying the *-bs overlays to the B variant of the SOC may result in
unstable operation due to undervolting.
Applying the rk3308-b@1.3ghz to a BS variant chip consumes more power and
has the potential to damage the SOC due to overvolting.

=====  For Older Kernels  ======
Install the following overlays only on older (unpatched) mainline kernels:

Older mainline kernels disable the Rock Pi S built-in SDNAND (EMMC)
###  rk3308-emmc
enables your SDNAND chip.  It is OK to install for boards that lack the SDNAND.

The legacy 4.4 and this mainline kernel drive the SDIO clock at 50Mhz to provide
maximum WiFi throughput.  However...

Older versions of the Mainline kernel drive the SDIO clock at only 1Mhz
This reduces WiFi throughput to < 500kB/s !

###  rk3308-sdio@10mhz
increases the SDIO clock to 10Mhz, providing about 2.4MB/s WiFi throughput.

###  rk3308-sdio@4mhz
increases the SDIO clock to only 4Mhz, providing about 1MB/s WiFi throughput.
use this only if 10Mhz SDIO clock is unstable

Note that older mainline kernels cannot drive the SDIO clock faster than 10Mhz.


**********************************
Details for Rock S0 overlays  (10 Apr 2024):

By default, the internal WiFi selects its internal chip antenna.
This antenna is so noisy as to be nearly unusable.
The external antenna, fortunately, works quite well.
Connect an external WiFi antenna and select it with:
###  rk3308-s0-ext-antenna

All Rock S0 boards use the RK3308B chip.
The:
###  rk3308-b@1.3ghz
overlay enables (overclocked) operation at 1.3ghz
1.3Ghz operation appears stable on the two boards I've tested.

The legacy kernel is not supported on the Rock S0
