andreil/OriVEmu
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andreili 91c1e6807f Initial commit
2024-09-30 01:21:31 +02:00
gui
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2024-09-30 01:21:31 +02:00
rtl
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sim_common @ edd2059a6a
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sim_wrappers
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work_dir/ROMs
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.gitignore
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CMakeLists.txt
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Description
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2.9 MiB
Languages
Verilog 71.9%
Assembly 9.8%
C++ 9.3%
SystemVerilog 7.6%
CMake 1.4%